i965/blorp: Prepare for more than two vertex attributesstaging/nouveaustaging/base

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

4 files changed, 22 insertions, 3 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index c84217006a9c..751e082ccc55 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -240,6 +240,19 @@ struct brw_blorp_prog_data
    uint8_t param[BRW_BLORP_NUM_PUSH_CONSTANT_DWORDS];
 };
 
+inline unsigned
+brw_blorp_get_urb_length(const struct brw_blorp_prog_data *prog_data)
+{
+   if (prog_data == NULL)
+      return 1;
+
+   /* From the BSpec: 3D Pipeline - Strips and Fans - 3DSTATE_SBE 
+    *
+    * read_length = ceiling((max_source_attr+1)/2)
+    */
+   return MAX2((prog_data->num_varying_inputs + 1) / 2, 1);
+}
+
 struct brw_blorp_params
 {
    uint32_t x0;
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.c b/src/mesa/drivers/dri/i965/gen6_blorp.c
index 2f26fa1a51f0..8b6b8f92cc3f 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.c
@@ -649,11 +649,13 @@ gen6_blorp_emit_sf_config(struct brw_context *brw,
 {
    const unsigned num_varyings =
       params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0;
+   const unsigned urb_read_length =
+      brw_blorp_get_urb_length(params->wm_prog_data);
 
    BEGIN_BATCH(20);
    OUT_BATCH(_3DSTATE_SF << 16 | (20 - 2));
    OUT_BATCH(num_varyings << GEN6_SF_NUM_OUTPUTS_SHIFT |
-             1 << GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT |
+             urb_read_length << GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT |
              BRW_SF_URB_ENTRY_READ_OFFSET <<
                 GEN6_SF_URB_ENTRY_READ_OFFSET_SHIFT);
    OUT_BATCH(0); /* dw2 */
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.c b/src/mesa/drivers/dri/i965/gen7_blorp.c
index e4cae1f6ca10..42157754d966 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.c
@@ -445,6 +445,8 @@ gen7_blorp_emit_sf_config(struct brw_context *brw,
    {
       const unsigned num_varyings =
          params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0;
+      const unsigned urb_read_length =
+         brw_blorp_get_urb_length(params->wm_prog_data);
 
       BEGIN_BATCH(14);
       OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2));
@@ -457,7 +459,7 @@ gen7_blorp_emit_sf_config(struct brw_context *brw,
        * than one vec4 worth of vertex attributes are needed.
        */
       OUT_BATCH(num_varyings << GEN7_SBE_NUM_OUTPUTS_SHIFT |
-                1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
+                urb_read_length << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
                 BRW_SF_URB_ENTRY_READ_OFFSET <<
                    GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT);
       for (int i = 0; i < 9; ++i)
diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.c b/src/mesa/drivers/dri/i965/gen8_blorp.c
index 13dda928575f..553c6373153a 100644
--- a/src/mesa/drivers/dri/i965/gen8_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen8_blorp.c
@@ -295,6 +295,8 @@ gen8_blorp_emit_sbe_state(struct brw_context *brw,
                           const struct brw_blorp_params *params)
 {
    const unsigned num_varyings = params->wm_prog_data->num_varying_inputs;
+   const unsigned urb_read_length =
+      brw_blorp_get_urb_length(params->wm_prog_data);
 
    /* 3DSTATE_SBE */
    {
@@ -310,7 +312,7 @@ gen8_blorp_emit_sbe_state(struct brw_context *brw,
        * than one vec4 worth of vertex attributes are needed.
        */
       OUT_BATCH(num_varyings << GEN7_SBE_NUM_OUTPUTS_SHIFT |
-                1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
+                urb_read_length << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
                 BRW_SF_URB_ENTRY_READ_OFFSET <<
                    GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT |
                 GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH |