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author | Thierry Reding <treding@nvidia.com> | 2014-06-04 09:26:25 +0200 |
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committer | Thierry Reding <treding@nvidia.com> | 2014-06-04 12:12:33 +0200 |
commit | a7426b06952338f3a10b30f22039780a493c7a61 (patch) | |
tree | 29b721727c7dd309c09af62ad91b41719189dfde /firmware/cxgb3/t3fw-7.10.0.bin.ihex | |
parent | 01de722e4387b7d227c8063e39504dddebec884b (diff) |
This is currently required to work around the lack of proper SMMU
support on Tegra. Ideally buffer objects could always be pinned to GART
and the SMMU will take care of mapping them to a linear I/O virtual
address range for importers.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'firmware/cxgb3/t3fw-7.10.0.bin.ihex')
0 files changed, 0 insertions, 0 deletions