diff options
| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2017-07-13 01:55:36 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-07-17 11:01:33 +0200 |
| commit | 04ee2ab395db733c04f02b6ba0d8f13aa0a5d744 (patch) | |
| tree | ae684b602dc964b89dce28205c5fb3227def4a89 | |
| parent | 7aa36a334dc3f11188d9cc024cfa06debb5cf7e6 (diff) | |
pinctrl: sh-pfc: r8a7796: Fix MOD_SEL2 bit26 to 0x0 when using SCK5_A
This patch fixes the implementation incorrect of MOD_SEL2 bit26 value
when SCK5_A pin function is selected for IPSR16 bit[31:28].
This is a correction to the incorrect implementation of MOD_SEL register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.
Fixes: f9aece7344bd81ce ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c index e489653eb914..a6d3c61ded7a 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c @@ -1410,7 +1410,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_MSEL(IP16_31_28, SSI_WS1_B, SEL_SSI_1), PINMUX_IPSR_GPSR(IP16_31_28, SCK1), PINMUX_IPSR_MSEL(IP16_31_28, STP_IVCXO27_1_A, SEL_SSP1_1_0), - PINMUX_IPSR_GPSR(IP16_31_28, SCK5_A), + PINMUX_IPSR_MSEL(IP16_31_28, SCK5_A, SEL_SCIF5_0), /* IPSR17 */ PINMUX_IPSR_MSEL(IP17_3_0, AUDIO_CLKA_A, SEL_ADG_A_0), |