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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2011-02-22 18:31:44 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2011-02-22 18:33:04 +0100 |
| commit | d21d781466785c317131a8a57606925867265dc8 (patch) | |
| tree | 50ec261014757a42c5eb35532cfc76eaa9437356 | |
| parent | 9599fde65a0d8b7e7c85199346f7b620bdd8388d (diff) | |
Fix relaxed tiling on gen2
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | src/intel_uxa.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/src/intel_uxa.c b/src/intel_uxa.c index 9341b914..754bb4e5 100644 --- a/src/intel_uxa.c +++ b/src/intel_uxa.c @@ -195,12 +195,16 @@ intel_uxa_pixmap_compute_size(PixmapPtr pixmap, *tiling = I915_TILING_NONE; if (*tiling != I915_TILING_NONE) { - int aligned_h; + int aligned_h, tile_height; if (*tiling == I915_TILING_X) - aligned_h = ALIGN(h, 8); + tile_height = 8; else - aligned_h = ALIGN(h, 32); + tile_height = 32; + /* i8xx has a 2-row interleaved tile layout */ + if (IS_GEN2(intel)) + tile_height *= 2; + aligned_h = ALIGN(h, tile_height); *stride = intel_get_fence_pitch(intel, ALIGN(pitch, 512), |