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authorJeff McGee <jeff.mcgee@intel.com>2015-03-09 16:13:03 -0700
committerDamien Lespiau <damien.lespiau@intel.com>2015-03-18 18:15:37 +0000
commitd556e068a7e4e9dfb57514244ae5f3e0eb9d0b39 (patch)
tree0013e8fe47f86c010434ff4ec099545487590f7d /include
parentd20413a7ce5816abe1127ffffc5bcab82f268c16 (diff)
intel: Export total subslice and EU counts
Update kernel interface with new I915_GETPARAM ioctl entries for subslice total and EU total. Add a wrapping function for each parameter. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID. The kernel detection of these values is device-specific. Userspace drivers should continue to maintain ID-based tables for older devices which return ENODEV when using this query. v2: remove unnecessary include of <stdbool.h> and increment the I915_GETPARAM indices to match updated kernel patch. For: VIZ-4636 Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Jeff McGee <jeff.mcgee@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/drm/i915_drm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 15dd01d4..b037e569 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -340,6 +340,8 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_HAS_EXEC_HANDLE_LUT 26
#define I915_PARAM_HAS_WT 27
#define I915_PARAM_CMD_PARSER_VERSION 28
+#define I915_PARAM_SUBSLICE_TOTAL 33
+#define I915_PARAM_EU_TOTAL 34
typedef struct drm_i915_getparam {
int param;