From 2d6c1e6d60ba3030450ca8396a332da84e8b7614 Mon Sep 17 00:00:00 2001 From: Ira Weiny Date: Tue, 17 Jan 2023 21:53:39 -0800 Subject: cxl/mem: Trace DRAM Event Record CXL rev 3.0 section 8.2.9.2.1.2 defines the DRAM Event Record. Determine if the event read is a DRAM event record and if so trace the record. Reviewed-by: Dan Williams Reviewed-by: Davidlohr Bueso Reviewed-by: Jonathan Cameron Signed-off-by: Ira Weiny Link: https://lore.kernel.org/r/20221216-cxl-ev-log-v7-4-2316a5c8f7d8@intel.com Signed-off-by: Dan Williams --- drivers/cxl/cxlmem.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'drivers/cxl/cxlmem.h') diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index 1713b4330ad4..9aacedda13f4 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -463,6 +463,29 @@ struct cxl_event_gen_media { u8 reserved[46]; } __packed; +/* + * DRAM Event Record - DER + * CXL rev 3.0 section 8.2.9.2.1.2; Table 3-44 + */ +#define CXL_EVENT_DER_CORRECTION_MASK_SIZE 0x20 +struct cxl_event_dram { + struct cxl_event_record_hdr hdr; + __le64 phys_addr; + u8 descriptor; + u8 type; + u8 transaction_type; + u8 validity_flags[2]; + u8 channel; + u8 rank; + u8 nibble_mask[3]; + u8 bank_group; + u8 bank; + u8 row[3]; + u8 column[2]; + u8 correction_mask[CXL_EVENT_DER_CORRECTION_MASK_SIZE]; + u8 reserved[0x17]; +} __packed; + struct cxl_mbox_get_partition_info { __le64 active_volatile_cap; __le64 active_persistent_cap; -- cgit v1.2.3