From eded9a08e20636b242455b0e841565a855ffa217 Mon Sep 17 00:00:00 2001 From: Damien Lespiau Date: Tue, 29 Jul 2014 18:06:20 +0100 Subject: drm/i915: Restrict hsw_dp_set_ddi_pll_sel() to HSW/BDW Future platform will use config->ddi_pll_sel in a different way. Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 9247d82f1dc2..8a33c08e16f9 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -943,7 +943,7 @@ found: &pipe_config->dp_m2_n2); } - if (HAS_DDI(dev)) + if (IS_HASWELL(dev) || IS_BROADWELL(dev)) hsw_dp_set_ddi_pll_sel(pipe_config, intel_dp->link_bw); else intel_dp_set_clock(encoder, pipe_config, intel_dp->link_bw); -- cgit v1.2.3