From fdd1e3489b30ba6ba3075d38ce6f448e04119c71 Mon Sep 17 00:00:00 2001 From: Dipen Patel Date: Thu, 13 Apr 2023 17:44:47 -0700 Subject: MAINTAINERS: Add HTE/timestamp subsystem details Add tree, mailing list and patchwork details. Signed-off-by: Dipen Patel Acked-by: Thierry Reding --- MAINTAINERS | 3 +++ 1 file changed, 3 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8d5bc223f305..65b58963f0d2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9425,6 +9425,9 @@ F: drivers/input/touchscreen/htcpen.c HTE SUBSYSTEM M: Dipen Patel +L: timestamp@lists.linux.dev +T: git git://git.kernel.org/pub/scm/linux/kernel/git/pateldipen1984/linux.git +Q: https://patchwork.kernel.org/project/timestamp/list/ S: Maintained F: Documentation/devicetree/bindings/timestamp/ F: Documentation/driver-api/hte/ -- cgit v1.2.3 From d0672fa4931dcb9d9d53002e855f25dd7507a300 Mon Sep 17 00:00:00 2001 From: Dipen Patel Date: Thu, 13 Apr 2023 17:44:48 -0700 Subject: dt-bindings: timestamp: Add Tegra234 support Added timestamp provider support for the Tegra234 in devicetree bindings. From Tegra234 SoC onwards, the nvidia,gpio-controller property is required. This is needed as the tegra always-on (AON) GPIO HTE/GTE provider depends on the AON GPIO controller where it needs to do namespace conversion between GPIO line number (belonging to AON GPIO controller instance) and the GTE slice bits. Signed-off-by: Dipen Patel Reviewed-by: Krzysztof Kozlowski --- .../bindings/timestamp/nvidia,tegra194-hte.yaml | 60 ++++++++++++++++++++-- 1 file changed, 56 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml b/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml index c31e207d1652..5de1eca9cbcd 100644 --- a/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml +++ b/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra194 on chip generic hardware timestamping engine (HTE) +title: Tegra on chip generic hardware timestamping engine (HTE) provider maintainers: - Dipen Patel @@ -23,6 +23,8 @@ properties: enum: - nvidia,tegra194-gte-aon - nvidia,tegra194-gte-lic + - nvidia,tegra234-gte-aon + - nvidia,tegra234-gte-lic reg: maxItems: 1 @@ -43,9 +45,14 @@ properties: description: HTE lines are arranged in 32 bit slice where each bit represents different line/signal that it can enable/configure for the timestamp. It is u32 - property and depends on the HTE instance in the chip. The value 3 is for - GPIO GTE and 11 for IRQ GTE. - enum: [3, 11] + property and the value depends on the HTE instance in the chip. + enum: [3, 11, 17] + + nvidia,gpio-controller: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The phandle to AON gpio controller instance. This is required to handle + namespace conversion between GPIO and GTE. '#timestamp-cells': description: @@ -62,6 +69,51 @@ required: - nvidia,slices - "#timestamp-cells" +allOf: + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra194-gte-aon + - nvidia,tegra234-gte-aon + then: + properties: + nvidia,slices: + const: 3 + + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra194-gte-lic + then: + properties: + nvidia,slices: + const: 11 + + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra234-gte-lic + then: + properties: + nvidia,slices: + const: 17 + + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra234-gte-aon + then: + required: + - nvidia,gpio-controller + additionalProperties: false examples: -- cgit v1.2.3 From 1815e37b6e67f2a543e36628bfe6a834aad3ea1b Mon Sep 17 00:00:00 2001 From: Dipen Patel Date: Thu, 13 Apr 2023 17:44:49 -0700 Subject: dt-bindings: timestamp: Deprecate nvidia,slices property The property is not necessary as it is a constant value and can be hardcoded in the driver code. Signed-off-by: Dipen Patel Reviewed-by: Linus Walleij Acked-by: Rob Herring --- .../devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml b/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml index 5de1eca9cbcd..456797967adc 100644 --- a/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml +++ b/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml @@ -42,10 +42,13 @@ properties: nvidia,slices: $ref: /schemas/types.yaml#/definitions/uint32 + deprecated: true description: HTE lines are arranged in 32 bit slice where each bit represents different line/signal that it can enable/configure for the timestamp. It is u32 - property and the value depends on the HTE instance in the chip. + property and the value depends on the HTE instance in the chip. The AON + GTE instances for both Tegra194 and Tegra234 has 3 slices. The Tegra194 + LIC instance has 11 slices and Tegra234 LIC has 17 slices. enum: [3, 11, 17] nvidia,gpio-controller: @@ -66,7 +69,6 @@ required: - compatible - reg - interrupts - - nvidia,slices - "#timestamp-cells" allOf: @@ -123,7 +125,6 @@ examples: reg = <0xc1e0000 0x10000>; interrupts = <0 13 0x4>; nvidia,int-threshold = <1>; - nvidia,slices = <3>; #timestamp-cells = <1>; }; @@ -133,7 +134,6 @@ examples: reg = <0x3aa0000 0x10000>; interrupts = <0 11 0x4>; nvidia,int-threshold = <1>; - nvidia,slices = <11>; #timestamp-cells = <1>; }; -- cgit v1.2.3 From 29662d622641af8866aac904c8aa264844086af3 Mon Sep 17 00:00:00 2001 From: Dipen Patel Date: Thu, 13 Apr 2023 17:44:50 -0700 Subject: arm64: tegra: Add Tegra234 GTE nodes Add GTE LIC and AON GPIO nodes for the tegra234 SoC. Signed-off-by: Dipen Patel Acked-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra234.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index 8fe8eda7654d..54790c6b6a2c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -1156,6 +1156,14 @@ clock-names = "fuse"; }; + hte_lic: hardware-timestamp@3aa0000 { + compatible = "nvidia,tegra234-gte-lic"; + reg = <0x0 0x3aa0000 0x0 0x10000>; + interrupts = ; + nvidia,int-threshold = <1>; + #timestamp-cells = <1>; + }; + hsp_top0: hsp@3c00000 { compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp"; reg = <0x0 0x03c00000 0x0 0xa0000>; @@ -1673,6 +1681,15 @@ #mbox-cells = <2>; }; + hte_aon: hardware-timestamp@c1e0000 { + compatible = "nvidia,tegra234-gte-aon"; + reg = <0x0 0xc1e0000 0x0 0x10000>; + interrupts = ; + nvidia,int-threshold = <1>; + nvidia,gpio-controller = <&gpio_aon>; + #timestamp-cells = <1>; + }; + gen2_i2c: i2c@c240000 { compatible = "nvidia,tegra194-i2c"; reg = <0x0 0xc240000 0x0 0x100>; -- cgit v1.2.3 From 59cc80a6d8695e7b4b51154ea2d08af551b6c359 Mon Sep 17 00:00:00 2001 From: Dipen Patel Date: Thu, 13 Apr 2023 17:44:51 -0700 Subject: hte: Re-phrase tegra API document Make Tegra194 API document generic to make it applicable for current and future tegra hte providers. Signed-off-by: Dipen Patel Reviewed-by: Bagas Sanjaya --- Documentation/driver-api/hte/index.rst | 2 +- Documentation/driver-api/hte/tegra-hte.rst | 47 ++++++++++++++++++++++++++ Documentation/driver-api/hte/tegra194-hte.rst | 48 --------------------------- 3 files changed, 48 insertions(+), 49 deletions(-) create mode 100644 Documentation/driver-api/hte/tegra-hte.rst delete mode 100644 Documentation/driver-api/hte/tegra194-hte.rst diff --git a/Documentation/driver-api/hte/index.rst b/Documentation/driver-api/hte/index.rst index 9f43301c05dc..29011de9a4b8 100644 --- a/Documentation/driver-api/hte/index.rst +++ b/Documentation/driver-api/hte/index.rst @@ -18,5 +18,5 @@ HTE Tegra Provider .. toctree:: :maxdepth: 1 - tegra194-hte + tegra-hte diff --git a/Documentation/driver-api/hte/tegra-hte.rst b/Documentation/driver-api/hte/tegra-hte.rst new file mode 100644 index 000000000000..85e654772782 --- /dev/null +++ b/Documentation/driver-api/hte/tegra-hte.rst @@ -0,0 +1,47 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +HTE Kernel provider driver +========================== + +Description +----------- +The Nvidia tegra HTE provider also known as GTE (Generic Timestamping Engine) +driver implements two GTE instances: 1) GPIO GTE and 2) LIC +(Legacy Interrupt Controller) IRQ GTE. Both GTE instances get the timestamp +from the system counter TSC which has 31.25MHz clock rate, and the driver +converts clock tick rate to nanoseconds before storing it as timestamp value. + +GPIO GTE +-------- + +This GTE instance timestamps GPIO in real time. For that to happen GPIO +needs to be configured as input. Only the always on (AON) GPIO controller +instance supports timestamping GPIOs in real time as it is tightly coupled with +the GPIO GTE. To support this, GPIOLIB adds two optional APIs as mentioned +below. The GPIO GTE code supports both kernel and userspace consumers. The +kernel space consumers can directly talk to HTE subsystem while userspace +consumers timestamp requests go through GPIOLIB CDEV framework to HTE +subsystem. The hte devicetree binding described at +``Documentation/devicetree/bindings/timestamp`` provides an example of how a +consumer can request an GPIO line. + +See gpiod_enable_hw_timestamp_ns() and gpiod_disable_hw_timestamp_ns(). + +For userspace consumers, GPIO_V2_LINE_FLAG_EVENT_CLOCK_HTE flag must be +specified during IOCTL calls. Refer to ``tools/gpio/gpio-event-mon.c``, which +returns the timestamp in nanoseconds. + +LIC (Legacy Interrupt Controller) IRQ GTE +----------------------------------------- + +This GTE instance timestamps LIC IRQ lines in real time. The hte devicetree +binding described at ``Documentation/devicetree/bindings/timestamp`` +provides an example of how a consumer can request an IRQ line. Since it is a +one-to-one mapping with IRQ GTE provider, consumers can simply specify the IRQ +number that they are interested in. There is no userspace consumer support for +this GTE instance in the HTE framework. + +The provider source code of both IRQ and GPIO GTE instances is located at +``drivers/hte/hte-tegra194.c``. The test driver +``drivers/hte/hte-tegra194-test.c`` demonstrates HTE API usage for both IRQ +and GPIO GTE. diff --git a/Documentation/driver-api/hte/tegra194-hte.rst b/Documentation/driver-api/hte/tegra194-hte.rst deleted file mode 100644 index f2d617265546..000000000000 --- a/Documentation/driver-api/hte/tegra194-hte.rst +++ /dev/null @@ -1,48 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0+ - -HTE Kernel provider driver -========================== - -Description ------------ -The Nvidia tegra194 HTE provider driver implements two GTE -(Generic Timestamping Engine) instances: 1) GPIO GTE and 2) LIC -(Legacy Interrupt Controller) IRQ GTE. Both GTE instances get the -timestamp from the system counter TSC which has 31.25MHz clock rate, and the -driver converts clock tick rate to nanoseconds before storing it as timestamp -value. - -GPIO GTE --------- - -This GTE instance timestamps GPIO in real time. For that to happen GPIO -needs to be configured as input. The always on (AON) GPIO controller instance -supports timestamping GPIOs in real time and it has 39 GPIO lines. The GPIO GTE -and AON GPIO controller are tightly coupled as it requires very specific bits -to be set in GPIO config register before GPIO GTE can be used, for that GPIOLIB -adds two optional APIs as below. The GPIO GTE code supports both kernel -and userspace consumers. The kernel space consumers can directly talk to HTE -subsystem while userspace consumers timestamp requests go through GPIOLIB CDEV -framework to HTE subsystem. - -See gpiod_enable_hw_timestamp_ns() and gpiod_disable_hw_timestamp_ns(). - -For userspace consumers, GPIO_V2_LINE_FLAG_EVENT_CLOCK_HTE flag must be -specified during IOCTL calls. Refer to ``tools/gpio/gpio-event-mon.c``, which -returns the timestamp in nanoseconds. - -LIC (Legacy Interrupt Controller) IRQ GTE ------------------------------------------ - -This GTE instance timestamps LIC IRQ lines in real time. There are 352 IRQ -lines which this instance can add timestamps to in real time. The hte -devicetree binding described at ``Documentation/devicetree/bindings/timestamp`` -provides an example of how a consumer can request an IRQ line. Since it is a -one-to-one mapping with IRQ GTE provider, consumers can simply specify the IRQ -number that they are interested in. There is no userspace consumer support for -this GTE instance in the HTE framework. - -The provider source code of both IRQ and GPIO GTE instances is located at -``drivers/hte/hte-tegra194.c``. The test driver -``drivers/hte/hte-tegra194-test.c`` demonstrates HTE API usage for both IRQ -and GPIO GTE. -- cgit v1.2.3 From b003fb5c9df8a8923bf46e0c00cc54edcfb0fbe3 Mon Sep 17 00:00:00 2001 From: Dipen Patel Date: Thu, 13 Apr 2023 17:44:52 -0700 Subject: hte: Add Tegra234 provider The Tegra234 AON GPIO instance and LIC IRQ support HTE. For the GPIO HTE support, it also requires to add mapping between GPIO and HTE framework same as it was done with Tegra194 SoC. Signed-off-by: Dipen Patel --- drivers/hte/hte-tegra194-test.c | 2 +- drivers/hte/hte-tegra194.c | 124 ++++++++++++++++++++++++++++++++++++++-- 2 files changed, 121 insertions(+), 5 deletions(-) diff --git a/drivers/hte/hte-tegra194-test.c b/drivers/hte/hte-tegra194-test.c index 5d776a185bd6..d79c28a80517 100644 --- a/drivers/hte/hte-tegra194-test.c +++ b/drivers/hte/hte-tegra194-test.c @@ -16,7 +16,7 @@ #include /* - * This sample HTE GPIO test driver demonstrates HTE API usage by enabling + * This sample HTE test driver demonstrates HTE API usage by enabling * hardware timestamp on gpio_in and specified LIC IRQ lines. * * Note: gpio_out and gpio_in need to be shorted externally in order for this diff --git a/drivers/hte/hte-tegra194.c b/drivers/hte/hte-tegra194.c index 49a27af22742..5d1f947db0f6 100644 --- a/drivers/hte/hte-tegra194.c +++ b/drivers/hte/hte-tegra194.c @@ -62,6 +62,10 @@ #define NV_AON_HTE_SLICE2_IRQ_GPIO_25 25 #define NV_AON_HTE_SLICE2_IRQ_GPIO_26 26 #define NV_AON_HTE_SLICE2_IRQ_GPIO_27 27 +#define NV_AON_HTE_SLICE2_IRQ_GPIO_28 28 +#define NV_AON_HTE_SLICE2_IRQ_GPIO_29 29 +#define NV_AON_HTE_SLICE2_IRQ_GPIO_30 30 +#define NV_AON_HTE_SLICE2_IRQ_GPIO_31 31 #define HTE_TECTRL 0x0 #define HTE_TETSCH 0x4 @@ -220,7 +224,100 @@ static const struct tegra_hte_line_mapped tegra194_aon_gpio_sec_map[] = { [39] = {NV_AON_SLICE_INVALID, 0}, }; -static const struct tegra_hte_data aon_hte = { +static const struct tegra_hte_line_mapped tegra234_aon_gpio_map[] = { + /* gpio, slice, bit_index */ + /* AA port */ + [0] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_11}, + [1] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_10}, + [2] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_9}, + [3] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_8}, + [4] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_7}, + [5] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_6}, + [6] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_5}, + [7] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_4}, + /* BB port */ + [8] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_3}, + [9] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_2}, + [10] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_1}, + [11] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_0}, + /* CC port */ + [12] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_22}, + [13] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_21}, + [14] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_20}, + [15] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_19}, + [16] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_18}, + [17] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_17}, + [18] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_16}, + [19] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_15}, + /* DD port */ + [20] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_14}, + [21] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_13}, + [22] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_12}, + /* EE port */ + [23] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_31}, + [24] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_30}, + [25] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_29}, + [26] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_28}, + [27] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_27}, + [28] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_26}, + [29] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_25}, + [30] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_24}, + /* GG port */ + [31] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_23}, +}; + +static const struct tegra_hte_line_mapped tegra234_aon_gpio_sec_map[] = { + /* gpio, slice, bit_index */ + /* AA port */ + [0] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_11}, + [1] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_10}, + [2] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_9}, + [3] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_8}, + [4] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_7}, + [5] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_6}, + [6] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_5}, + [7] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_4}, + /* BB port */ + [8] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_3}, + [9] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_2}, + [10] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_1}, + [11] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_0}, + [12] = {NV_AON_SLICE_INVALID, 0}, + [13] = {NV_AON_SLICE_INVALID, 0}, + [14] = {NV_AON_SLICE_INVALID, 0}, + [15] = {NV_AON_SLICE_INVALID, 0}, + /* CC port */ + [16] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_22}, + [17] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_21}, + [18] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_20}, + [19] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_19}, + [20] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_18}, + [21] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_17}, + [22] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_16}, + [23] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_15}, + /* DD port */ + [24] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_14}, + [25] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_13}, + [26] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_12}, + [27] = {NV_AON_SLICE_INVALID, 0}, + [28] = {NV_AON_SLICE_INVALID, 0}, + [29] = {NV_AON_SLICE_INVALID, 0}, + [30] = {NV_AON_SLICE_INVALID, 0}, + [31] = {NV_AON_SLICE_INVALID, 0}, + /* EE port */ + [32] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_31}, + [33] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_30}, + [34] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_29}, + [35] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_28}, + [36] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_27}, + [37] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_26}, + [38] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_25}, + [39] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_24}, + /* GG port */ + [40] = {2, NV_AON_HTE_SLICE2_IRQ_GPIO_23}, +}; + +static const struct tegra_hte_data t194_aon_hte = { .map_sz = ARRAY_SIZE(tegra194_aon_gpio_map), .map = tegra194_aon_gpio_map, .sec_map_sz = ARRAY_SIZE(tegra194_aon_gpio_sec_map), @@ -228,6 +325,14 @@ static const struct tegra_hte_data aon_hte = { .type = HTE_TEGRA_TYPE_GPIO, }; +static const struct tegra_hte_data t234_aon_hte = { + .map_sz = ARRAY_SIZE(tegra234_aon_gpio_map), + .map = tegra234_aon_gpio_map, + .sec_map_sz = ARRAY_SIZE(tegra234_aon_gpio_sec_map), + .sec_map = tegra234_aon_gpio_sec_map, + .type = HTE_TEGRA_TYPE_GPIO, +}; + static const struct tegra_hte_data lic_hte = { .map_sz = 0, .map = NULL, @@ -535,7 +640,9 @@ static bool tegra_hte_match_from_linedata(const struct hte_chip *chip, static const struct of_device_id tegra_hte_of_match[] = { { .compatible = "nvidia,tegra194-gte-lic", .data = &lic_hte}, - { .compatible = "nvidia,tegra194-gte-aon", .data = &aon_hte}, + { .compatible = "nvidia,tegra194-gte-aon", .data = &t194_aon_hte}, + { .compatible = "nvidia,tegra234-gte-lic", .data = &lic_hte}, + { .compatible = "nvidia,tegra234-gte-aon", .data = &t234_aon_hte}, { } }; MODULE_DEVICE_TABLE(of, tegra_hte_of_match); @@ -635,8 +742,17 @@ static int tegra_hte_probe(struct platform_device *pdev) gc->match_from_linedata = tegra_hte_match_from_linedata; - hte_dev->c = gpiochip_find("tegra194-gpio-aon", - tegra_get_gpiochip_from_name); + if (of_device_is_compatible(dev->of_node, + "nvidia,tegra194-gte-aon")) + hte_dev->c = gpiochip_find("tegra194-gpio-aon", + tegra_get_gpiochip_from_name); + else if (of_device_is_compatible(dev->of_node, + "nvidia,tegra234-gte-aon")) + hte_dev->c = gpiochip_find("tegra234-gpio-aon", + tegra_get_gpiochip_from_name); + else + return -ENODEV; + if (!hte_dev->c) return dev_err_probe(dev, -EPROBE_DEFER, "wait for gpio controller\n"); -- cgit v1.2.3 From 0ebc475fb636df12222faa04dd989a4e3c87f31a Mon Sep 17 00:00:00 2001 From: Dipen Patel Date: Thu, 13 Apr 2023 17:44:53 -0700 Subject: hte: Deprecate nvidia,slices property The relevant DT bindings deprecates nvidia,slices property from Tegra234 SoC onwards, moving the slices value per SoC data structure instead. Signed-off-by: Dipen Patel --- drivers/hte/hte-tegra194.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/drivers/hte/hte-tegra194.c b/drivers/hte/hte-tegra194.c index 5d1f947db0f6..945c68c5e476 100644 --- a/drivers/hte/hte-tegra194.c +++ b/drivers/hte/hte-tegra194.c @@ -118,6 +118,7 @@ struct tegra_hte_line_data { struct tegra_hte_data { enum tegra_hte_type type; + u32 slices; u32 map_sz; u32 sec_map_sz; const struct tegra_hte_line_mapped *map; @@ -323,6 +324,7 @@ static const struct tegra_hte_data t194_aon_hte = { .sec_map_sz = ARRAY_SIZE(tegra194_aon_gpio_sec_map), .sec_map = tegra194_aon_gpio_sec_map, .type = HTE_TEGRA_TYPE_GPIO, + .slices = 3, }; static const struct tegra_hte_data t234_aon_hte = { @@ -331,12 +333,21 @@ static const struct tegra_hte_data t234_aon_hte = { .sec_map_sz = ARRAY_SIZE(tegra234_aon_gpio_sec_map), .sec_map = tegra234_aon_gpio_sec_map, .type = HTE_TEGRA_TYPE_GPIO, + .slices = 3, }; -static const struct tegra_hte_data lic_hte = { +static const struct tegra_hte_data t194_lic_hte = { .map_sz = 0, .map = NULL, .type = HTE_TEGRA_TYPE_LIC, + .slices = 11, +}; + +static const struct tegra_hte_data t234_lic_hte = { + .map_sz = 0, + .map = NULL, + .type = HTE_TEGRA_TYPE_LIC, + .slices = 17, }; static inline u32 tegra_hte_readl(struct tegra_hte_soc *hte, u32 reg) @@ -639,9 +650,9 @@ static bool tegra_hte_match_from_linedata(const struct hte_chip *chip, } static const struct of_device_id tegra_hte_of_match[] = { - { .compatible = "nvidia,tegra194-gte-lic", .data = &lic_hte}, + { .compatible = "nvidia,tegra194-gte-lic", .data = &t194_lic_hte}, { .compatible = "nvidia,tegra194-gte-aon", .data = &t194_aon_hte}, - { .compatible = "nvidia,tegra234-gte-lic", .data = &lic_hte}, + { .compatible = "nvidia,tegra234-gte-lic", .data = &t234_lic_hte}, { .compatible = "nvidia,tegra234-gte-aon", .data = &t234_aon_hte}, { } }; @@ -679,13 +690,6 @@ static int tegra_hte_probe(struct platform_device *pdev) dev = &pdev->dev; - ret = of_property_read_u32(dev->of_node, "nvidia,slices", &slices); - if (ret != 0) { - dev_err(dev, "Could not read slices\n"); - return -EINVAL; - } - nlines = slices << 5; - hte_dev = devm_kzalloc(dev, sizeof(*hte_dev), GFP_KERNEL); if (!hte_dev) return -ENOMEM; @@ -697,6 +701,13 @@ static int tegra_hte_probe(struct platform_device *pdev) dev_set_drvdata(&pdev->dev, hte_dev); hte_dev->prov_data = of_device_get_match_data(&pdev->dev); + ret = of_property_read_u32(dev->of_node, "nvidia,slices", &slices); + if (ret != 0) + slices = hte_dev->prov_data->slices; + + dev_dbg(dev, "slices:%d\n", slices); + nlines = slices << 5; + hte_dev->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(hte_dev->regs)) return PTR_ERR(hte_dev->regs); -- cgit v1.2.3 From d02b1cabc7c6fe0e237bf8a2a6a8813302cfd87c Mon Sep 17 00:00:00 2001 From: Dipen Patel Date: Thu, 13 Apr 2023 17:44:54 -0700 Subject: hte: handle nvidia,gpio-controller property The dt binding adds nvidia,gpio-controller property from Tegra234 SoC onwards to simplify code handling gpio chip search. The gpio chip search is needed for the AON GPIO GTE instances to map the hardware timestamp GPIO request (coming from the GPIO framework) to the tegra HTE providers. The patch also adds new gpio chip match function to match from the fwnode instead of the gpio controller label. The addition of the property does not break ABI for the existing Tegra194 code. Signed-off-by: Dipen Patel Reviewed-by: Linus Walleij --- drivers/hte/hte-tegra194.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/drivers/hte/hte-tegra194.c b/drivers/hte/hte-tegra194.c index 945c68c5e476..2c485ff5be22 100644 --- a/drivers/hte/hte-tegra194.c +++ b/drivers/hte/hte-tegra194.c @@ -679,6 +679,11 @@ static int tegra_get_gpiochip_from_name(struct gpio_chip *chip, void *data) return !strcmp(chip->label, data); } +static int tegra_gpiochip_match(struct gpio_chip *chip, void *data) +{ + return chip->fwnode == of_node_to_fwnode(data); +} + static int tegra_hte_probe(struct platform_device *pdev) { int ret; @@ -687,6 +692,7 @@ static int tegra_hte_probe(struct platform_device *pdev) struct device *dev; struct tegra_hte_soc *hte_dev; struct hte_chip *gc; + struct device_node *gpio_ctrl; dev = &pdev->dev; @@ -754,15 +760,23 @@ static int tegra_hte_probe(struct platform_device *pdev) gc->match_from_linedata = tegra_hte_match_from_linedata; if (of_device_is_compatible(dev->of_node, - "nvidia,tegra194-gte-aon")) + "nvidia,tegra194-gte-aon")) { hte_dev->c = gpiochip_find("tegra194-gpio-aon", tegra_get_gpiochip_from_name); - else if (of_device_is_compatible(dev->of_node, - "nvidia,tegra234-gte-aon")) - hte_dev->c = gpiochip_find("tegra234-gpio-aon", - tegra_get_gpiochip_from_name); - else - return -ENODEV; + } else { + gpio_ctrl = of_parse_phandle(dev->of_node, + "nvidia,gpio-controller", + 0); + if (!gpio_ctrl) { + dev_err(dev, + "gpio controller node not found\n"); + return -ENODEV; + } + + hte_dev->c = gpiochip_find(gpio_ctrl, + tegra_gpiochip_match); + of_node_put(gpio_ctrl); + } if (!hte_dev->c) return dev_err_probe(dev, -EPROBE_DEFER, -- cgit v1.2.3 From 7d507452048d9a6971998339243d16a09c95a842 Mon Sep 17 00:00:00 2001 From: Dipen Patel Date: Thu, 13 Apr 2023 17:44:55 -0700 Subject: gpio: tegra186: Add Tegra234 hte support To enable timestamp support for the Tegra234, has_gte variable needs to be set true. Signed-off-by: Dipen Patel Acked-by: Thierry Reding Acked-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-tegra186.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c index 14c872b6ad05..b904de0b1784 100644 --- a/drivers/gpio/gpio-tegra186.c +++ b/drivers/gpio/gpio-tegra186.c @@ -1134,6 +1134,7 @@ static const struct tegra_gpio_soc tegra234_aon_soc = { .name = "tegra234-gpio-aon", .instance = 1, .num_irqs_per_bank = 8, + .has_gte = true, }; #define TEGRA241_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \ -- cgit v1.2.3 From 902dea62b3dda532172c0f4d0410fe595266b22c Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 10 Mar 2023 08:47:06 -0600 Subject: hte: Use of_property_present() for testing DT property presence It is preferred to use typed property access functions (i.e. of_property_read_ functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Signed-off-by: Rob Herring Acked-by: Dipen Patel Signed-off-by: Dipen Patel --- drivers/hte/hte.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hte/hte.c b/drivers/hte/hte.c index 7c3b4476f890..9f3221462e75 100644 --- a/drivers/hte/hte.c +++ b/drivers/hte/hte.c @@ -518,7 +518,7 @@ static struct hte_device *hte_of_get_dev(struct device *dev, np = dev->of_node; - if (!of_find_property(np, "timestamp-names", NULL)) { + if (!of_property_present(np, "timestamp-names")) { /* Let hte core construct it during request time */ desc->attr.name = NULL; } else { -- cgit v1.2.3 From 6680c835ada1b34e882d0a32612f7294c62e27e0 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 15 Dec 2022 17:46:19 +0100 Subject: hte: tegra: fix 'struct of_device_id' build error Without the extra #include, this driver produces a build failure in some configurations. drivers/hte/hte-tegra194-test.c:96:34: error: array type has incomplete element type 'struct of_device_id' 96 | static const struct of_device_id tegra_hte_test_of_match[] = { Fixes: 9a75a7cd03c9 ("hte: Add Tegra HTE test driver") Signed-off-by: Arnd Bergmann Acked-by: Dipen Patel Signed-off-by: Dipen Patel --- drivers/hte/hte-tegra194-test.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/hte/hte-tegra194-test.c b/drivers/hte/hte-tegra194-test.c index d79c28a80517..98d1fd6de071 100644 --- a/drivers/hte/hte-tegra194-test.c +++ b/drivers/hte/hte-tegra194-test.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include -- cgit v1.2.3 From e078180d66848a6a890daf0a3ce28dc43cc66790 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Wed, 19 Apr 2023 17:30:00 +0300 Subject: hte: tegra-194: Fix off by one in tegra_hte_map_to_line_id() The "map_sz" is the number of elements in the "m" array so the > comparison needs to be changed to >= to prevent an out of bounds read. Fixes: 09574cca6ad6 ("hte: Add Tegra194 HTE kernel provider") Signed-off-by: Dan Carpenter Acked-by: Dipen Patel Signed-off-by: Dipen Patel --- drivers/hte/hte-tegra194.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hte/hte-tegra194.c b/drivers/hte/hte-tegra194.c index 2c485ff5be22..06ef349a2265 100644 --- a/drivers/hte/hte-tegra194.c +++ b/drivers/hte/hte-tegra194.c @@ -367,7 +367,7 @@ static int tegra_hte_map_to_line_id(u32 eid, { if (m) { - if (eid > map_sz) + if (eid >= map_sz) return -EINVAL; if (m[eid].slice == NV_AON_SLICE_INVALID) return -EINVAL; -- cgit v1.2.3 From 9e0c2d40a40733fba605ff47a08f3eba2fab4fbb Mon Sep 17 00:00:00 2001 From: ye xingchen Date: Thu, 17 Nov 2022 15:17:29 +0800 Subject: hte: Use device_match_of_node() Replace the open-code with device_match_of_node(). Signed-off-by: ye xingchen Acked-by: Dipen Patel Signed-off-by: Dipen Patel --- drivers/hte/hte.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hte/hte.c b/drivers/hte/hte.c index 9f3221462e75..67c15724ee78 100644 --- a/drivers/hte/hte.c +++ b/drivers/hte/hte.c @@ -444,7 +444,7 @@ static struct hte_device *of_node_to_htedevice(struct device_node *np) list_for_each_entry(gdev, &hte_devices, list) if (gdev->chip && gdev->chip->dev && - gdev->chip->dev->of_node == np) { + device_match_of_node(gdev->chip->dev, np)) { spin_unlock(&hte_lock); return gdev; } -- cgit v1.2.3 From ca3d1a4b419acad3fca6828884acb03614f7558b Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 8 Feb 2023 19:33:28 +0200 Subject: hte: tegra-194: Use proper includes The test driver uses the gpiod consumer API so include the right header. This may cause a problem with struct of_device_id being implcitly pulled in by the legacy header so include explicitly as well. While at it, drop explicit moduleparam.h (it's included with module.h) and sort the headers. Signed-off-by: Linus Walleij Signed-off-by: Andy Shevchenko Acked-by: Dipen Patel Signed-off-by: Dipen Patel --- drivers/hte/hte-tegra194-test.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/hte/hte-tegra194-test.c b/drivers/hte/hte-tegra194-test.c index 98d1fd6de071..ba37a5efbf82 100644 --- a/drivers/hte/hte-tegra194-test.c +++ b/drivers/hte/hte-tegra194-test.c @@ -6,15 +6,14 @@ */ #include +#include +#include +#include #include #include -#include -#include -#include -#include #include +#include #include -#include /* * This sample HTE test driver demonstrates HTE API usage by enabling -- cgit v1.2.3