summaryrefslogtreecommitdiff
path: root/include/linux/qcom_scm.h
AgeCommit message (Collapse)AuthorFilesLines
2020-01-07firmware: qcom_scm: Order functions, definitions by service/commandElliot Berman1-55/+68
Definitions throughout qcom_scm are loosely grouped and loosely ordered. Sort all the functions/definitions by service ID/command ID to improve sanity when needing to add new functionality to this driver. Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Brian Masney <masneyb@onstation.org> # arm32 Tested-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Elliot Berman <eberman@codeaurora.org> Link: https://lore.kernel.org/r/1578431066-19600-16-git-send-email-eberman@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-07firmware: qcom_scm: Remove unused qcom_scm_get_versionElliot Berman1-2/+0
Remove unused qcom_scm_get_version. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Brian Masney <masneyb@onstation.org> # arm32 Tested-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Elliot Berman <eberman@codeaurora.org> Link: https://lore.kernel.org/r/1578431066-19600-4-git-send-email-eberman@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-06firmware: scm: Add stubs for OCMEM and restore_sec_cfg_availableKrzysztof Kozlowski1-0/+6
Add few more stubs (for OCMEM-related functions and qcom_scm_restore_sec_cfg_available()) in case of !CONFIG_QCOM_SCM. These are actually not necessary for builds but provide them for completeness. Reviewed-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200103220825.28710-1-krzk@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-06Merge tag 'drm-next-2019-12-06' of git://anongit.freedesktop.org/drm/drmLinus Torvalds1-0/+26
Pull more drm updates from Dave Airlie: "Rob pointed out I missed his pull request for msm-next, it's been in next for a while outside of my tree so shouldn't cause any unexpected issues, it has some OCMEM support in drivers/soc that is acked by other maintainers as it's outside my tree. Otherwise it's a usual fixes pull, i915, amdgpu, the main ones, with some tegra, omap, mgag200 and one core fix. Summary: msm-next: - OCMEM support for a3xx and a4xx GPUs. - a510 support + display support core: - mst payload deletion fix i915: - uapi alignment fix - fix for power usage regression due to security fixes - change default preemption timeout to 640ms from 100ms - EHL voltage level display fixes - TGL DGL PHY fix - gvt - MI_ATOMIC cmd parser fix, CFL non-priv warning - CI spotted deadlock fix - EHL port D programming fix amdgpu: - VRAM lost fixes on BACO for CI/VI - navi14 DC fixes - misc SR-IOV, gfx10 fixes - XGMI fixes for arcturus - SRIOV fixes amdkfd: - KFD on ppc64le enabled - page table optimisations radeon: - fix for r1xx/2xx register checker. tegra: - displayport regression fixes - DMA API regression fixes mgag200: - fix devices that can't scanout except at 0 addr omap: - fix dma_addr refcounting" * tag 'drm-next-2019-12-06' of git://anongit.freedesktop.org/drm/drm: (100 commits) drm/dp_mst: Correct the bug in drm_dp_update_payload_part1() drm/omap: fix dma_addr refcounting drm/tegra: Run hub cleanup on ->remove() drm/tegra: sor: Make the +5V HDMI supply optional drm/tegra: Silence expected errors on IOMMU attach drm/tegra: vic: Export module device table drm/tegra: sor: Implement system suspend/resume drm/tegra: Use proper IOVA address for cursor image drm/tegra: gem: Remove premature import restrictions drm/tegra: gem: Properly pin imported buffers drm/tegra: hub: Remove bogus connection mutex check ia64: agp: Replace empty define with do while agp: Add bridge parameter documentation agp: remove unused variable num_segments agp: move AGPGART_MINOR to include/linux/miscdevice.h agp: remove unused variable size in agp_generic_create_gatt_table drm/dp_mst: Fix build on systems with STACKTRACE_SUPPORT=n drm/radeon: fix r1xx/r2xx register checker for POT textures drm/amdgpu: fix GFX10 missing CSIB set(v3) drm/amdgpu: should stop GFX ring in hw_fini ...
2019-11-04firmware/qcom_scm: Add scm call to handle smmu errataVivek Gautam1-0/+2
Qcom's smmu-500 needs to toggle wait-for-safe sequence to handle TLB invalidation sync's. Few firmwares allow doing that through SCM interface. Add API to toggle wait for safe from firmware through a SCM call. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Acked-by: Andy Gross <agross@kernel.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Will Deacon <will@kernel.org>
2019-10-07firmware: qcom: scm: add support to restore secure config to qcm_scm-32Rob Clark1-0/+11
Add support to restore the secure configuration for qcm_scm-32.c. This is needed by the On Chip MEMory (OCMEM) that is present on some Snapdragon devices. Signed-off-by: Rob Clark <robdclark@gmail.com> [masneyb@onstation.org: ported to latest kernel; set ctx_bank_num to spare parameter.] Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Gabriel Francisco <frc.gabrielgmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07firmware: qcom: scm: add OCMEM lock/unlock interfaceRob Clark1-0/+15
Add support for the OCMEM lock/unlock interface that is needed by the On Chip MEMory (OCMEM) that is present on some Snapdragon devices. Signed-off-by: Rob Clark <robdclark@gmail.com> [masneyb@onstation.org: ported to latest kernel; minor reformatting.] Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Gabriel Francisco <frc.gabrielgmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-07-22firmware: qcom_scm: Cleanup code in qcom_scm_assign_mem()Stephen Boyd1-4/+5
There are some questionable coding styles in this function. It looks quite odd to deref a pointer with array indexing that only uses the first element. Also, destroying an input/output variable halfway through the function and then overwriting it on success is not clear. It's better to use a local variable and the kernel macros to step through each bit set in a bitmask and clearly show where outputs are set. Cc: Ian Jackson <ian.jackson@citrix.com> Cc: Julien Grall <julien.grall@arm.com> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> [bjorn: Changed for_each_set_bit() size to BITS_PER_LONG] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284Thomas Gleixner1-9/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 and only version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 294 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-10qcom-scm: Include <linux/err.h> headerFabio Estevam1-0/+1
Since commit e6f6d63ed14c ("drm/msm: add headless gpu device for imx5") the DRM_MSM symbol can be selected by SOC_IMX5 causing the following error when building imx_v6_v7_defconfig: In file included from ../drivers/gpu/drm/msm/adreno/a5xx_gpu.c:17:0: ../include/linux/qcom_scm.h: In function 'qcom_scm_set_cold_boot_addr': ../include/linux/qcom_scm.h:73:10: error: 'ENODEV' undeclared (first use in this function) return -ENODEV; Include the <linux/err.h> header file to fix this problem. Reported-by: kernelci.org bot <bot@kernelci.org> Fixes: e6f6d63ed14c ("drm/msm: add headless gpu device for imx5") Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-12-05firmware: qcom: scm: fix compilation error when disabledJonathan Marek1-0/+3
This fixes the case when CONFIG_QCOM_SCM is not enabled, and linux/errno.h has not been included previously. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-10-13firmware: qcom: scm: Add WLAN VMID for Qualcomm SCM interfaceGovind Singh1-1/+3
Add WLAN related VMID's to support wlan driver to set up the remote's permissions call via TrustZone. Signed-off-by: Govind Singh <govinds@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-07-21firmware: qcom: scm: add a dummy qcom_scm_assign_mem()Niklas Cassel1-0/+4
Add a dummy qcom_scm_assign_mem() to enable building drivers when CONFIG_COMPILE_TEST=y && CONFIG_QCOM_SCM=n. All other qcom_scm_* functions already have a dummy version. Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-12-20firmware: qcom_scm: Add dependent headers to qcom_scm.hJordan Crouse1-0/+3
qcom_scm.h makes heavy use of <linux/types.h> and <linux/cpumask.h>. Add the dependent header files so that users of SCM don't need to include header files they don't otherwise use. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-11-17Merge tag 'rproc-v4.15' of git://github.com/andersson/remoteprocLinus Torvalds1-0/+16
Pull remoteproc updates from Bjorn Andersson: "This adds an interface for configuring Qualcomm's "secure SMMU" and adds support for booting the modem Hexagon on MSM8996. Two new debugfs entries are added in the remoteproc core to introspect the list of memory carveouts and the loaded resource table" * tag 'rproc-v4.15' of git://github.com/andersson/remoteproc: remoteproc: qcom: Fix error handling paths in order to avoid memory leaks remoteproc: qcom: Drop pr_err in q6v5_xfer_mem_ownership() remoteproc: debug: add carveouts list dump feature remoteproc: debug: add resource table dump feature remoteproc: qcom: Add support for mss remoteproc on msm8996 remoteproc: qcom: Make secure world call for mem ownership switch remoteproc: qcom: refactor mss fw image loading sequence firmware: scm: Add new SCM call API for switching memory ownership
2017-10-30firmware: scm: Add new SCM call API for switching memory ownershipAvaneesh Kumar Dwivedi1-0/+16
Two different processors on a SOC need to switch memory ownership during load/unload. To enable this, second level memory map table need to be updated, which is done by secure layer. This patch adds the interface for making secure monitor call for memory ownership switching request. Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org> [bjorn: Minor style and kerneldoc updates] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2017-10-11firmware: qcom: scm: Expose secure IO serviceBjorn Andersson1-0/+4
The secure IO service provides operations for reading and writing secure memory from non-secure mode, expose this API through SCM. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28firmware: qcom_scm: add two scm calls for iommu secure page tableStanimir Varbanov1-0/+4
Those two new SCM calls are needed from qcom-iommu driver in order to initialize secure iommu page table. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28firmware/qcom: add qcom_scm_restore_sec_cfg()Rob Clark1-0/+2
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-01-16firmware: qcom_scm: Add set remote state APIAndy Gross1-1/+3
This patch adds a set remote state SCM API. This will be used by the Venus and GPU subsystems to set state on the remote processors. This work was based on two patch sets by Jordan Crouse and Stanimir Varbanov. Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-01-16firmware: qcom: scm: Add empty functions to help compile testingStanimir Varbanov1-15/+35
This will help to compile testing drivers which depends on scm functions with COMPILE_TEST Kconfig option. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-06-24firmware: qcom: scm: Peripheral Authentication ServiceBjorn Andersson1-0/+8
This adds the Peripheral Authentication Service (PAS) interface to the Qualcomm SCM interface. The API is used to authenticate and boot a range of external processors in various Qualcomm platforms. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2015-10-14qcom-scm: add missing prototype for qcom_scm_is_available()Rob Clark1-0/+2
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
2015-05-28firmware: qcom: scm: Add HDCP Supportjilai wang1-1/+12
HDCP driver needs to check if secure environment supports HDCP. If it's supported, then it requires to program some registers through SCM. Add qcom_scm_hdcp_available and qcom_scm_hdcp_req to support these requirements. Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11firmware: qcom: scm: Support cpu power down through SCMLina Iyer1-1/+6
Support powering down the calling cpu, by trapping into SCM. This termination function triggers the ARM cpu to execute WFI instruction, causing the power controller to safely power the cpu down. Caches may be flushed before powering down the cpu. If cache controller is set to turn off when the cpu is powered down, then the flags argument indicates to the secure mode to flush its cache lines before executing WFI.The warm boot reset address for the cpu should be set before the calling into this function for the cpu to resume. The original code for the qcom_scm_call_atomic1() comes from a patch by Stephen Boyd [1]. The function scm_call_atomic1() has been cherry picked and renamed to match the convention used in this file. Since there are no users of scm_call_atomic2(), the function is not included. [1]. https://lkml.org/lkml/2014/8/4/765 Signed-off-by: Stephen Boyd <sboyd@codeauraro.org> Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11firmware: qcom: scm: Add qcom_scm_set_warm_boot_addr functionLina Iyer1-5/+2
A core can be powered down for cpuidle or when it is hotplugged off. In either case, the warmboot return address would be different. Allow setting the warmboot address for a specific cpu, optimize and write to the firmware, if the address is different than the previously set address. Export qcom_scm_set_warm_boot_addr function move the warm boot flags to implementation. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11firmware: qcom: scm: Clean cold boot entry to export only the APILina Iyer1-4/+1
We dont need to export the SCM specific cold boot flags to the platform code. Export only a function to set the cold boot address. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11firmware: qcom: scm: Move the scm driver to drivers/firmwareKumar Gala1-0/+29
Architectural changes in the ARM Linux kernel tree mandate the eventual removal of the mach-* directories. Move the scm driver to drivers/firmware and the scm header to include/linux to support that removal. Signed-off-by: Kumar Gala <galak@codeaurora.org>