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2018-09-28Merge tag 'spi-fix-v4.19-rc5' of ↵Greg Kroah-Hartman4-15/+82
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Mark writes: "spi: Fixes for v4.19 Quite a few fixes for the Renesas drivers in here, plus a fix for the Tegra driver and some documentation fixes for the recently added spi-mem code. The Tegra fix is relatively large but fairly straightforward and mechanical, it runs on probe so it's been reasonably well covered in -next testing." * tag 'spi-fix-v4.19-rc5' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: spi-mem: Move the DMA-able constraint doc to the kerneldoc header spi: spi-mem: Add missing description for data.nbytes field spi: rspi: Fix interrupted DMA transfers spi: rspi: Fix invalid SPI use during system suspend spi: sh-msiof: Fix handling of write value for SISTR register spi: sh-msiof: Fix invalid SPI use during system suspend spi: gpio: Fix copy-and-paste error spi: tegra20-slink: explicitly enable/disable clock
2018-09-17Merge tag 'spi-fix-v4.19-rc4' of ↵Greg Kroah-Hartman2-2/+17
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Mark writes: "spi: Fixes for v4.19 As well as one driver fix there's a couple of fixes here which address issues with the use of IDRs for allocation of dynamic bus numbers, ensuring that dynamic bus numbers interact well with static bus numbers assigned via DT and otherwise." * tag 'spi-fix-v4.19-rc4' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: spi-fsl-dspi: fix broken DSPI_EOQ_MODE spi: Fix double IDR allocation with DT aliases spi: fix IDR collision on systems with both fixed and dynamic SPI bus numbers
2018-09-05spi: rspi: Fix interrupted DMA transfersGeert Uytterhoeven1-4/+6
When interrupted, wait_event_interruptible_timeout() returns -ERESTARTSYS, and the SPI transfer in progress will fail, as expected: m25p80 spi0.0: SPI transfer failed: -512 spi_master spi0: failed to transfer one message from queue However, as the underlying DMA transfers may not have completed, all subsequent SPI transfers may start to fail: spi_master spi0: receive timeout qspi_transfer_out_in() returned -110 m25p80 spi0.0: SPI transfer failed: -110 spi_master spi0: failed to transfer one message from queue Fix this by calling dmaengine_terminate_all() not only for timeouts, but also for errors. This can be reproduced on r8a7991/koelsch, using "hd /dev/mtd0" followed by CTRL-C. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2018-09-05spi: rspi: Fix invalid SPI use during system suspendGeert Uytterhoeven1-0/+24
If the SPI queue is running during system suspend, the system may lock up. Fix this by stopping/restarting the queue during system suspend/resume, by calling spi_master_suspend()/spi_master_resume() from the PM callbacks. In-kernel users will receive an -ESHUTDOWN error while system suspend/resume is in progress. Based on a patch for sh-msiof by Gaku Inami. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2018-09-05spi: sh-msiof: Fix handling of write value for SISTR registerHiromitsu Yamasaki1-1/+2
This patch changes writing to the SISTR register according to the H/W user's manual. The TDREQ bit and RDREQ bits of SISTR are read-only, and must be written their initial values of zero. Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> [geert: reword] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2018-09-05spi: sh-msiof: Fix invalid SPI use during system suspendGaku Inami1-0/+25
If the SPI queue is running during system suspend, the system may lock up. Fix this by stopping/restarting the queue during system suspend/resume by calling spi_master_suspend()/spi_master_resume() from the PM callbacks. In-kernel users will receive an -ESHUTDOWN error while system suspend/resume is in progress. Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> [geert: Cleanup, reword] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2018-09-04spi: gpio: Fix copy-and-paste errorLinus Walleij1-2/+2
This fixes an embarrassing copy-and-paste error in the errorpath of spi_gpio_request(): we were checking the wrong struct member for error code right after retrieveing the sck GPIO. Fixes: 9b00bc7b901ff672 ("spi: spi-gpio: Rewrite to use GPIO descriptors") Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-09-03spi: tegra20-slink: explicitly enable/disable clockMarcel Ziswiler1-8/+23
Depending on the SPI instance one may get an interrupt storm upon requesting resp. interrupt unless the clock is explicitly enabled beforehand. This has been observed trying to bring up instance 4 on T20. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2018-08-28spi: spi-fsl-dspi: fix broken DSPI_EOQ_MODEAngelo Dureghello1-0/+6
This patch fixes the dspi_eoq_write function used by the ColdFire mcf5441x family. The 16 bit cmd part must be re-set at each data transfer. Also, now that fifo_size variables are used for eoq_read/write, a proper fifo size must be set (16 slots for the ColdFire dspi module version). Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Esben Haabendal <esben@haabendal.dk> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2018-08-28spi: Fix double IDR allocation with DT aliasesGeert Uytterhoeven1-11/+11
If the SPI bus number is provided by a DT alias, idr_alloc() is called twice, leading to: WARNING: CPU: 1 PID: 1 at drivers/spi/spi.c:2179 spi_register_controller+0x11c/0x5d8 couldn't get idr Fix this by moving the handling of fixed SPI bus numbers up, before the DT handling code fills in ctlr->bus_num. Fixes: 1a4327fbf4554d5b ("spi: fix IDR collision on systems with both fixed and dynamic SPI bus numbers") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-08-18Merge tag 'hwlock-v4.19' of git://github.com/andersson/remoteprocLinus Torvalds1-7/+4
Pull hwspinlock updates from Bjorn Andersson: "This introduces devres helpers and an API to request a lock by name, then migrates the sprd SPI driver to use these" * tag 'hwlock-v4.19' of git://github.com/andersson/remoteproc: hwspinlock: Fix incorrect return pointers spi: sprd: Change to use devm_hwspin_lock_request_specific() spi: sprd: Replace of_hwspin_lock_get_id() with of_hwspin_lock_get_id_byname() hwspinlock: Fix one comment mistake hwspinlock: Remove redundant config hwspinlock: Add devm_xxx() APIs to register/unregister one hwlock controller hwspinlock: Add devm_xxx() APIs to request/free hwlock hwspinlock: Add one new API to support getting a specific hwlock by the name
2018-08-15spi: fix IDR collision on systems with both fixed and dynamic SPI bus numbersKirill Kapranov1-0/+9
On systems where some controllers get a dynamic ID assigned and some have a fixed number (e.g. from ACPI tables), the current implementation might run into an IDR collision: in case of a fixed bus number is gotten by a driver (but not marked busy in IDR tree) and a driver with dynamic bus number gets the same ID and predictably fails. Fix this by means of checking-in fixed IDsin IDR as far as dynamic ones at the moment of the controller registration. Fixes: 9b61e302210e (spi: Pick spi bus number from Linux idr or spi alias) Signed-off-by: Kirill Kapranov <kirill.kapranov@compulab.co.il> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2018-08-10Merge branch 'spi-4.19' into spi-nextMark Brown20-350/+1121
2018-08-10Merge branch 'spi-4.18' into spi-linusMark Brown6-65/+86
2018-08-10spi: davinci: fix a NULL pointer dereferenceBartosz Golaszewski1-1/+1
On non-OF systems spi->controlled_data may be NULL. This causes a NULL pointer derefence on dm365-evm. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2018-08-02spi: spi-mem: Extend the SPI mem interface to set a custom memory nameFrieder Schrempf1-0/+28
When porting (Q)SPI controller drivers from the MTD layer to the SPI layer, the naming scheme for the memory devices changes. To be able to keep compatibility with the old drivers naming scheme, a name field is added to struct spi_mem and a hook is added to let controller drivers set a custom name for the memory device. Example for the FSL QSPI driver: Name with the old driver: 21e0000.qspi, or with multiple devices: 21e0000.qspi-0, 21e0000.qspi-1, ... Name with the new driver without spi_mem_get_name: spi4.0 Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Frieder Schrempf <frieder.schrempf@exceet.de> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-08-02spi: uniphier: remove unnecessary include headersKeiji Hayashibara1-2/+0
This commit removed include headers of linux/of.h and linux/of_platform.h, because they are not used. Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-08-01spi: spi-gpio: add SPI_3WIRE supportLorenzo Bianconi2-1/+32
Add SPI_3WIRE support to spi-gpio controller introducing set_line_direction function pointer in spi_bitbang data structure. Spi-gpio controller has been tested using hts221 temp/rh iio sensor running in 3wire mode and lsm6dsm running in 4wire mode Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-08-01spi: add flags parameter to txrx_word function pointersLorenzo Bianconi7-43/+56
Add the capability to specify the flag parameter used in bitbang_txrx_be_cpha{0,1} through the txrx_word function pointers of spi_bitbang data structure. That feature will be used to add spi-3wire support to the spi-gpio controller Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-08-01spi: add SPI controller driver for UniPhier SoCKeiji Hayashibara3-0/+539
Add SPI controller driver implemented in Socionext UniPhier SoCs. UniPhier SoCs have two types SPI controllers; SCSSI supports a single channel, and MCSSI supports multiple channels. This driver supports SCSSI only. This controller has 32bit TX/RX FIFO with depth of eight entry, and supports the SPI master mode only. This commit is implemented in PIO transfer mode, not DMA transfer. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-30spi: img-spfi: Set device select bits for SPFI port stateIonela Voinescu1-0/+3
Even if the chip select line is not controlled by the SPFI hardware, the device select bits need to be set to specify the chip select line in use for the hardware to know what parameters to use for the current transfer. Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-30spi: omap2-mcspi: remove several redundant variablesColin Ian King1-9/+0
Variable count, l, mcspi and spi_cntrl are being assigned but are never used hence they are redundant and can be removed. Cleans up clang warnings: warning: variable 'count' set but not used [-Wunused-but-set-variable] warning: variable 'l' set but not used [-Wunused-but-set-variable] warning: variable 'mcspi' set but not used [-Wunused-but-set-variable] warning: variable 'spi_cntrl' set but not used [-Wunused-but-set-variable] Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-30spi: dw-mmio: add MSCC Ocelot supportAlexandre Belloni1-0/+90
Because the SPI controller deasserts the chip select when the TX fifo is empty (which may happen in the middle of a transfer), the CS should be handled by linux. Unfortunately, some or all of the first four chip selects are not muxable as GPIOs, depending on the SoC. There is a way to bitbang those pins by using the SPI boot controller so use it to set the chip selects. At init time, it is also necessary to give control of the SPI interface to the Designware IP. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-30spi: dw: export dw_spi_set_csAlexandre Belloni2-1/+3
Export dw_spi_set_cs so it can be used from the various IP integration modules. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-26spi: spi-fsl-espi: Log fifo counters on errorTiago Brusamarello1-1/+4
Log RX and TX fifo counters when a transfer is done and these are not zero. Signed-off-by: Tiago Brusamarello <tiago.brusamarello@datacom.ind.br> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-24spi: imx: Use the longuest possible burst size when in dynamic_burstMaxime Chevallier1-37/+85
Dynamic burst mode allows to group together multiple words and send them in one continuous burst. When the number of bytes to be sent is not a strict multiple of the FIFO entry size (32 bits), the controller expects the non aligned bits to be sent first. This commit adds support for this particular constraint, avoiding the need to send the non-aligned bytes one by one at the end of the transfer, speeding-up transfer speed in that case. With this method, a transfer is divided into multiple bursts, limited in size by the maximum amount of data that the controller can transfer in one continuous burst (which is 512 bytes). The non-512 byte part of the transfer is sent first. The remaining bytes to be transferred in the current burst is stored in the 'remainder' field. With this method, the read_u32 field is no longer necessary, and is removed. This was tested on imx6 solo and imx6 quad. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-24spi: imx: remove unnecessary check in spi_imx_can_dmaMaxime Chevallier1-3/+0
The spi_imx_can_dma function computes the watermark level so that the transfer will fit in exactly N bursts (without a remainder). The smallest watermark level possible being one FIFO entry per burst, we can't never have a case where the transfer size isn't divsiible by 1. Remove the extra check for the wml being different than 0. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-24spi: imx: Use correct number of bytes per wordsMaxime Chevallier1-4/+6
The SPI core enforces that we always use the next power-of-two number of bytes to store words. As a result, a 24 bits word will be stored in 4 bytes. This commit fixes the spi_imx_bytes_per_word function to return the correct number of bytes. This also allows to get rid of unnecessary checks in the can_dma function, since the SPI core validates that we always have a transfer length that is a multiple of the number of bytes per word. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-24spi: imx: Use dynamic bursts only when bits_per_word is 8, 16 or 32Maxime Chevallier1-14/+9
The dynamic bursts mode allows to group together multiple words into a single burst. To do so, it's necessary that words can be packed into the 32-bits FIFO entries, so we can't allow using this mode with bit_per_words different to 8, 16 or 32. This prevents shitfing out extra clock ticks for transfers with bit_per_word values not aligned on 8 bits. With that , we are sure that only the correct number of bits is shifted out at each transfer, so we don't need to mask out the remaining parts of the words. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-24spi: imx: Remove duplicate variable assignmentsMaxime Chevallier1-2/+0
Some fields in struct spi_imx_data are assigned a different value twice in a row, in spi_imx_setupxfer. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-24spi: spi-fsl-dspi: Switch to SPDX identifierFabio Estevam1-14/+6
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-18Merge tag 'spi-dw-set-cs' of ↵Mark Brown2-0/+4
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-4.19 spi: dw: Allow custom set_cs_callback Allow platform specific drivers to provide their own set_cs callback when the IP integration requires it.
2018-07-18spi: dw: allow providing own set_cs callbackAlexandre Belloni2-0/+4
Allow platform specific drivers to provide their own set_cs callback when the IP integration requires it. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-18spi: dw: fix possible race conditionAlexandre Belloni1-1/+2
It is possible to get an interrupt as soon as it is requested. dw_spi_irq does spi_controller_get_devdata(master) and expects it to be different than NULL. However, spi_controller_set_devdata() is called after request_irq(), resulting in the following crash: CPU 0 Unable to handle kernel paging request at virtual address 00000030, epc == 8058e09c, ra == 8018ff90 [...] Call Trace: [<8058e09c>] dw_spi_irq+0x8/0x64 [<8018ff90>] __handle_irq_event_percpu+0x70/0x1d4 [<80190128>] handle_irq_event_percpu+0x34/0x8c [<801901c4>] handle_irq_event+0x44/0x80 [<801951a8>] handle_level_irq+0xdc/0x194 [<8018f580>] generic_handle_irq+0x38/0x50 [<804c6924>] ocelot_irq_handler+0x104/0x1c0 Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17spi: spi-fsl-dspi: Fill actual_length when doing DMA transferAndrey Smirnov1-2/+5
Upper layer users of SPI device drivers may rely on 'actual_length', so it is important that information is correctly reported. One such example is spi_mem_exec_op() function that will fail if 'actual_length' of the data transferred is not what was requested. Add necessary code to populate 'actual_length. Cc: Mark Brown <broonie@kernel.org> Cc: Sanchayan Maity <maitysanchayan@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: cphealy@gmail.com Cc: linux-spi@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-11spi: cadence: Fix missing clk_disable_unprepare() on error in ↵Wei Yongjun1-1/+1
cnds_runtime_resume() Fix the missing clk_disable_unprepare() before return from cnds_runtime_resume() in the error handling case. Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-02spi: spi-fsl-dspi: Fix imprecise abort on VF500 during probeKrzysztof Kozlowski1-12/+12
Registers of DSPI should not be accessed before enabling its clock. On Toradex Colibri VF50 on Iris carrier board this could be seen during bootup as imprecise abort: Unhandled fault: imprecise external abort (0x1c06) at 0x00000000 Internal error: : 1c06 [#1] ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 4.14.39-dirty #97 Hardware name: Freescale Vybrid VF5xx/VF6xx (Device Tree) Backtrace: [<804166a8>] (regmap_write) from [<80466b5c>] (dspi_probe+0x1f0/0x8dc) [<8046696c>] (dspi_probe) from [<8040107c>] (platform_drv_probe+0x54/0xb8) [<80401028>] (platform_drv_probe) from [<803ff53c>] (driver_probe_device+0x280/0x2f8) [<803ff2bc>] (driver_probe_device) from [<803ff674>] (__driver_attach+0xc0/0xc4) [<803ff5b4>] (__driver_attach) from [<803fd818>] (bus_for_each_dev+0x70/0xa4) [<803fd7a8>] (bus_for_each_dev) from [<803fee74>] (driver_attach+0x24/0x28) [<803fee50>] (driver_attach) from [<803fe980>] (bus_add_driver+0x1a0/0x218) [<803fe7e0>] (bus_add_driver) from [<803fffe8>] (driver_register+0x80/0x100) [<803fff68>] (driver_register) from [<80400fdc>] (__platform_driver_register+0x48/0x50) [<80400f94>] (__platform_driver_register) from [<8091cf7c>] (fsl_dspi_driver_init+0x1c/0x20) [<8091cf60>] (fsl_dspi_driver_init) from [<8010195c>] (do_one_initcall+0x4c/0x174) [<80101910>] (do_one_initcall) from [<80900e8c>] (kernel_init_freeable+0x144/0x1d8) [<80900d48>] (kernel_init_freeable) from [<805ff6a8>] (kernel_init+0x10/0x114) [<805ff698>] (kernel_init) from [<80107be8>] (ret_from_fork+0x14/0x2c) Cc: <stable@vger.kernel.org> Fixes: 5ee67b587a2b ("spi: dspi: clear SPI_SR before enable interrupt") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-28spi: pxa2xx: Add support for Intel Ice LakeMika Westerberg1-0/+4
Intel Ice Lake SPI host controller follows the Intel Cannon Lake but the PCI IDs are different. Add the new PCI IDs to the driver supported devices list. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2018-06-26spi: sprd: Change to use devm_hwspin_lock_request_specific()Baolin Wang1-6/+3
Change to use devm_hwspin_lock_request_specific() instead of freeing the hwlock explicitly when unbound the device. Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2018-06-26spi: sprd: Replace of_hwspin_lock_get_id() with of_hwspin_lock_get_id_byname()Baolin Wang1-1/+1
Now the hwlock core has supplied new function to get a specific hwlock id by one hwlock name, which is more clear for users. So change to use of_hwspin_lock_get_id_byname(). Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2018-06-21spi: spi-fsl-dspi: Fix copy-paste error in dspi_probeGustavo A. R. Silva1-1/+1
It seems that the proper structure field to use in this particular case is *regmap_pushr* instead of regmap. Addresses-Coverity-ID: 1470126 ("Copy-paste error") Fixes: 58ba07ec79e6 ("spi: spi-fsl-dspi: Add support for XSPI mode registers") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: Esben Haabendal <eha@deif.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Enable extended SPI modeEsben Haabendal1-1/+3
Set the XSPI bit for devices configured for XSPI mode (currently LS1021A), and thereby switch to extended SPI mode, allowing for SPI transfers using from 4 to 32 bits per word instead of 4 to 16 bits per word. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Advertise 32 bit for XSPI modeEsben Haabendal1-1/+5
Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: XSPI FIFO handling (in TCFQ mode)Esben Haabendal1-7/+48
This implements handling of split CMD and TX FIFO queues for XSPI when running in TCFQ mode. It should be simple to add it to EOQ mode also. Currently, EOQ mode is only used with coldfire. So if coldfire DSPI supports XSPI, XSPI FIFO handling should be added to EOQ mode also. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Framesize control for XSPI modeEsben Haabendal1-0/+10
Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Add support for XSPI mode registersEsben Haabendal1-2/+61
This prepares for adding support for extended SPI mode (XSPI), by extending the regmap with the extra SREX and CTAREx registers. An additional register map is made for allowing 16 bit access to CMD and TX FIFO of the PUSHR register separately, which is also needed for XSPI mode support. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20Merge branch 'spi-4.18' into spi-4.19 for DSPI depMark Brown4-62/+82
2018-06-20spi: spi-fsl-dspi: Fixup regmap configurationEsben Haabendal1-0/+12
Mark volatile registers to avoid caching bugs. Note: SPI_MCR is marked volatile because of CLR_TXF and CLR_RXF bits. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Fix MCR register handlingEsben Haabendal1-7/+3
The MCR register is not changed, so initialize it in dspi_init(). The exception is the CLR_TXF and CLR_RXF bits, which should be written to before each transfer to make sure we start with empty FIFOs. With MCR register now configured as volatile, the regmap_update_bits will do a real read-modify-write cycle. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Support 4 to 16 bits per word transfersEsben Haabendal1-163/+88
This extends the driver with support for all SPI framesizes from 4 to 16 bits, and adds support for per transfer specific bits_per_word, while at the same time reducing code size and complexity. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>