~sima/drm - danvet's drm/ playground

Age	Commit message (Expand)	Author	Files	Lines
2022-07-21	cxl/hdm: Enumerate allocated DPA	Dan Williams	3	-11/+149
2022-07-21	cxl/core: Define a 'struct cxl_endpoint_decoder'	Dan Williams	3	-14/+41
2022-07-21	cxl/core: Define a 'struct cxl_root_decoder'	Dan Williams	3	-13/+76
2022-07-21	cxl/acpi: Track CXL resources in iomem_resource	Dan Williams	1	-3/+141
2022-07-21	cxl/core: Define a 'struct cxl_switch_decoder'	Dan Williams	4	-84/+175
2022-07-19	cxl/port: Read CDAT table	Ira Weiny	4	-0/+234
2022-07-19	cxl/pci: Create PCI DOE mailbox's for memory devices	Ira Weiny	3	-0/+48
2022-07-11	cxl/pmem: Delete unused nvdimm attribute	Dan Williams	1	-1/+0
2022-07-10	cxl/hdm: Initialize decoder type for memory expander devices	Dan Williams	1	-5/+11
2022-07-10	cxl/port: Cache CXL host bridge data	Dan Williams	2	-1/+19
2022-07-10	tools/testing/cxl: Add partition support	Dan Williams	2	-6/+8
2022-07-10	cxl/mem: Add a debugfs version of 'iomem' for DPA, 'dpamem'	Dan Williams	4	-0/+53
2022-07-10	cxl/debug: Move debugfs init to cxl_core_init()	Dan Williams	3	-12/+13
2022-07-09	cxl/hdm: Require all decoders to be enumerated	Ben Widawsky	1	-9/+3
2022-07-09	cxl/mem: Convert partition-info to resources	Dan Williams	4	-40/+54
2022-07-09	cxl: Introduce cxl_to_{ways,granularity}	Dan Williams	3	-41/+54
2022-07-09	cxl/core: Drop is_cxl_decoder()	Dan Williams	2	-7/+0
2022-07-09	cxl/core: Drop ->platform_res attribute for root decoders	Dan Williams	4	-41/+18
2022-07-09	cxl/core: Rename ->decoder_range ->hpa_range	Dan Williams	3	-5/+5
2022-07-09	cxl/hdm: Use local hdm variable	Ben Widawsky	1	-2/+1
2022-07-09	cxl/port: Keep port->uport valid for the entire life of a port	Dan Williams	1	-2/+2
2022-06-28	cxl/mbox: Fix missing variable payload checks in cmd size validation	Vishal Verma	1	-2/+4
2022-06-21	cxl/mbox: Use __le32 in get,set_lsa mailbox structures	Alison Schofield	2	-7/+7
2022-06-21	cxl/core: Use is_endpoint_decoder	Ben Widawsky	3	-2/+3
2022-06-21	cxl: Fix cleanup of port devices on failure to probe driver.	Jonathan Cameron	1	-1/+6
2022-05-20	cxl/port: Enable HDM Capability after validating DVSEC Ranges	Dan Williams	1	-15/+152
2022-05-19	cxl/port: Reuse 'struct cxl_hdm' context for hdm init	Dan Williams	3	-41/+25
2022-05-19	cxl/port: Move endpoint HDM Decoder Capability init to port driver	Dan Williams	2	-11/+11
2022-05-19	cxl/pci: Drop @info argument to cxl_hdm_decode_init()	Dan Williams	3	-13/+9
2022-05-19	cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()	Dan Williams	3	-88/+78
2022-05-19	cxl/mem: Skip range enumeration if mem_enable clear	Dan Williams	2	-1/+3
2022-05-19	cxl/mem: Consolidate CXL DVSEC Range enumeration in the core	Dan Williams	5	-142/+141
2022-05-19	cxl/pci: Move cxl_await_media_ready() to the core	Dan Williams	4	-47/+51
2022-05-19	cxl/mem: Validate port connectivity before dvsec ranges	Dan Williams	1	-16/+16
2022-05-19	cxl/mem: Fix cxl_mem_probe() error exit	Dan Williams	1	-2/+4
2022-05-19	cxl/pci: Drop wait_for_valid() from cxl_await_media_ready()	Dan Williams	1	-4/+0
2022-05-19	cxl/pci: Consolidate wait_for_media() and wait_for_media_ready()	Dan Williams	2	-20/+3
2022-05-19	cxl/mem: Drop mem_enabled check from wait_for_media()	Dan Williams	1	-4/+0
2022-04-28	cxl: Drop cxl_device_lock()	Dan Williams	5	-120/+33
2022-04-28	cxl/acpi: Add root device lockdep validation	Dan Williams	1	-0/+13
2022-04-28	cxl: Replace lockdep_mutex with local lock classes	Dan Williams	3	-4/+18
2022-04-28	cxl/mbox: fix logical vs bitwise typo	Dan Carpenter	1	-1/+1
2022-04-22	cxl/mbox: Replace NULL check with IS_ERR() after vmemdup_user()	Alison Schofield	1	-1/+1
2022-04-22	cxl/mbox: Use type __u32 for mailbox payload sizes	Alison Schofield	1	-13/+15
2022-04-22	PM: CXL: Disable suspend	Dan Williams	6	-2/+62
2022-04-12	cxl/mem: Replace redundant debug message with a comment	Dan Williams	1	-4/+10
2022-04-12	cxl/mem: Rename cxl_dvsec_decode_init() to cxl_hdm_decode_init()	Dan Williams	1	-6/+6
2022-04-12	cxl/pci: Make cxl_dvsec_ranges() failure not fatal to cxl_pci	Dan Williams	1	-9/+18
2022-04-12	cxl/mem: Make cxl_dvsec_range() init failure fatal	Dan Williams	1	-0/+3
2022-04-12	cxl/pci: Add debug for DVSEC range init failures	Dan Williams	1	-3/+10