Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2021-02-11 | clk: tegra: cvb: Provide missing description for 'tegra_cvb_add_opp_table()'s... | Lee Jones | 1 | -0/+1 |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 | Thomas Gleixner | 1 | -10/+1 |
2019-02-06 | clk: tegra: dfll: CVB calculation alignment with the regulator | Joseph Lo | 1 | -5/+7 |
2016-11-01 | clk: tegra: dfll: improve function-level documentation | Julia Lawall | 1 | -5/+5 |
2016-04-28 | clk: tegra: dfll: Properly clean up on failure and removal | Thierry Reding | 1 | -0/+16 |
2016-04-28 | clk: tegra: dfll: Make code more comprehensible | Thierry Reding | 1 | -28/+27 |
2015-09-15 | clk: tegra: Unlock top rates for Tegra124 DFLL clock | Mikko Perttunen | 1 | -7/+0 |
2015-07-16 | clk: tegra: Add functions for parsing CVB tables | Tuomas Tynkkynen | 1 | -0/+140 |