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path: root/arch/riscv/configs
AgeCommit message (Expand)AuthorFilesLines
2019-11-22Merge branch 'next/defconfig-add-debug' into for-nextPaul Walmsley2-0/+48
2019-11-22riscv: defconfigs: enable more debugging optionsPaul Walmsley2-0/+46
2019-11-22riscv: defconfigs: enable debugfsPaul Walmsley2-0/+2
2019-11-17riscv: add nommu supportChristoph Hellwig1-0/+78
2019-09-19RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfigAnup Patel2-0/+22
2019-08-13riscv: defconfig: Update the defconfigAlistair Francis1-0/+2
2019-08-13riscv: rv32_defconfig: Update the defconfigAlistair Francis1-0/+3
2019-07-31riscv: defconfig: align RV64 defconfig to the output of "make savedefconfig"Paul Walmsley1-5/+5
2019-07-01riscv: defconfig: enable SOC_SIFIVELoys Ollivier1-5/+1
2019-07-01RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERSAnup Patel2-0/+4
2019-06-26RISC-V: defconfig: enable MMC & SPI for RISC-VAtish Patra1-0/+5
2019-06-11RISC-V: defconfig: enable clocks, serial consoleKevin Hilman1-0/+4
2019-04-09RISC-V: Add separate defconfig for 32bit systemsAnup Patel1-0/+84
2019-01-23RISC-V: defconfig: Add CRYPTO_DEV_VIRTIO=yPalmer Dabbelt1-0/+1
2019-01-23RISC-V: defconfig: Enable Generic PCIE by defaultAlistair Francis1-1/+2
2019-01-23RISC-V: defconfig: Move CONFIG_PCI{,E_XILINX}Palmer Dabbelt1-2/+2
2018-12-17RISC-V: defconfig: Enable RISC-V SBI earlycon supportAnup Patel1-0/+1
2018-11-12RISC-V: defconfig: Enable printk timestampsAnup Patel1-0/+1
2018-11-01RISC-V: refresh defconfigAnup Patel1-8/+8
2018-08-13irqchip: add a SiFive PLIC driverChristoph Hellwig1-0/+1
2018-06-11RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfigPalmer Dabbelt1-0/+1
2018-04-02RISC-V: Enable module support in defconfigZong Li1-0/+2
2018-01-07RISC-V: Add a basic defconfigKarsten Merker1-0/+75
2017-09-26RISC-V: Build InfrastructurePalmer Dabbelt1-0/+0