| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2012-01-08 | C6X: fix timer64 initialization | Mark Salter | 1 | -1/+9 |
| 2012-01-08 | C6X: fix layout of EMIFA registers | Mark Salter | 1 | -1/+0 |
| 2011-10-06 | C6X: DSCR - Device State Configuration Registers | Mark Salter | 1 | -0/+598 |
| 2011-10-06 | C6X: EMIF - External Memory Interface | Mark Salter | 1 | -0/+88 |
| 2011-10-06 | C6X: cache control | Aurelien Jacquiot | 1 | -0/+445 |
| 2011-10-06 | C6X: clocks | Mark Salter | 2 | -0/+848 |
| 2011-10-06 | C6X: interrupt handling | Aurelien Jacquiot | 1 | -0/+349 |
| 2011-10-06 | C6X: time management | Aurelien Jacquiot | 1 | -0/+236 |
| 2011-10-06 | C6X: devicetree support | Mark Salter | 1 | -0/+17 |
| 2011-10-06 | C6X: build infrastructure | Aurelien Jacquiot | 2 | -0/+28 |
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index : ~sima/drm | |
| danvet's drm/ playground | danvet |
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