~sima/drm - danvet's drm/ playground

Age	Commit message (Collapse)	Author	Files	Lines
2017-10-05	PCI: v3: Update the device tree bindings	Linus Walleij	1	-7/+68
	The bindings for the V3 Semiconductor PCI bridge are a tad bit outdated and predates the more formal format we have adopted for the bindings. Update them a bit so it is easier to read, and add the Integrator AP- specific compatible so we can detect that we are running on that specific platform. Add a second register bank for the configuration memory area. The device tree specs do specify a memory range for configuration space but it is not applicable to custom accessors like this. Instead follow the pattern from the Versatile PCI adapter and simply add a second register bank for this memory. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
2013-06-15	ARM: integrator: basic PCIv3 device tree support	Linus Walleij	1	-0/+15
	This registers the memory ranges for I/O, non-prefetched and prefetched memory and configuration space for the PCIv3 bridge and let us fetch these basic memory resources from the device tree in the device tree boot path. Remove the stepping stone platform device. This is an either/or approach - the platform data path is mutually exclusive to the plain platform data path and provided addresses from the device tree have to be correct. This adds the interrupt-map property to the PCIv3 DTS file and makes the bridge obtain mappings from the device tree. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>