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authorStanley Chu <stanley.chu@mediatek.com>2022-06-16 13:37:15 +0800
committerMartin K. Petersen <martin.petersen@oracle.com>2022-06-16 22:08:43 -0400
commitfc53683b45b053d94a660c417fd3d63cabc43b6f (patch)
tree7f7624597af154f91d204c577559c752e5b14c2e
parent4de0d18da901bd271d9e4f13415c4a6eedee0591 (diff)
scsi: ufs: Export ufshcd_uic_change_pwr_mode()
Export ufshcd_uic_change_pwr_mode() to allow vendors to use it for SoC-specific power mode change design limitations. Link: https://lore.kernel.org/r/20220616053725.5681-2-stanley.chu@mediatek.com Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
-rw-r--r--drivers/ufs/core/ufshcd.c3
-rw-r--r--include/ufs/ufshcd.h1
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index bb6cbd514a69..f484ba61472a 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -4093,7 +4093,7 @@ out_unlock:
*
* Returns 0 on success, non-zero value on failure
*/
-static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
+int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
{
struct uic_command uic_cmd = {0};
int ret;
@@ -4118,6 +4118,7 @@ static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
out:
return ret;
}
+EXPORT_SYMBOL_GPL(ufshcd_uic_change_pwr_mode);
int ufshcd_link_recovery(struct ufs_hba *hba)
{
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 991aea081ec7..cb66304bda3d 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -1099,6 +1099,7 @@ extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
u32 *mib_val, u8 peer);
extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
struct ufs_pa_layer_attr *desired_pwr_mode);
+extern int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode);
/* UIC command interfaces for DME primitives */
#define DME_LOCAL 0