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Diffstat (limited to 'arch/arm/mach-shmobile/clock-sh7377.c')
-rw-r--r--arch/arm/mach-shmobile/clock-sh7377.c50
1 files changed, 25 insertions, 25 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
index 85f2a3ec2c4..b8480d19e1c 100644
--- a/arch/arm/mach-shmobile/clock-sh7377.c
+++ b/arch/arm/mach-shmobile/clock-sh7377.c
@@ -24,31 +24,31 @@
#include <mach/common.h>
/* SH7377 registers */
-#define RTFRQCR 0xe6150000
-#define SYFRQCR 0xe6150004
-#define CMFRQCR 0xe61500E0
-#define VCLKCR1 0xe6150008
-#define VCLKCR2 0xe615000C
-#define VCLKCR3 0xe615001C
-#define FMSICKCR 0xe6150010
-#define FMSOCKCR 0xe6150014
-#define FSICKCR 0xe6150018
-#define PLLC1CR 0xe6150028
-#define PLLC2CR 0xe615002C
-#define SUBUSBCKCR 0xe6150080
-#define SPUCKCR 0xe6150084
-#define MSUCKCR 0xe6150088
-#define MVI3CKCR 0xe6150090
-#define HDMICKCR 0xe6150094
-#define MFCK1CR 0xe6150098
-#define MFCK2CR 0xe615009C
-#define DSITCKCR 0xe6150060
-#define DSIPCKCR 0xe6150064
-#define SMSTPCR0 0xe6150130
-#define SMSTPCR1 0xe6150134
-#define SMSTPCR2 0xe6150138
-#define SMSTPCR3 0xe615013C
-#define SMSTPCR4 0xe6150140
+#define RTFRQCR IOMEM(0xe6150000)
+#define SYFRQCR IOMEM(0xe6150004)
+#define CMFRQCR IOMEM(0xe61500E0)
+#define VCLKCR1 IOMEM(0xe6150008)
+#define VCLKCR2 IOMEM(0xe615000C)
+#define VCLKCR3 IOMEM(0xe615001C)
+#define FMSICKCR IOMEM(0xe6150010)
+#define FMSOCKCR IOMEM(0xe6150014)
+#define FSICKCR IOMEM(0xe6150018)
+#define PLLC1CR IOMEM(0xe6150028)
+#define PLLC2CR IOMEM(0xe615002C)
+#define SUBUSBCKCR IOMEM(0xe6150080)
+#define SPUCKCR IOMEM(0xe6150084)
+#define MSUCKCR IOMEM(0xe6150088)
+#define MVI3CKCR IOMEM(0xe6150090)
+#define HDMICKCR IOMEM(0xe6150094)
+#define MFCK1CR IOMEM(0xe6150098)
+#define MFCK2CR IOMEM(0xe615009C)
+#define DSITCKCR IOMEM(0xe6150060)
+#define DSIPCKCR IOMEM(0xe6150064)
+#define SMSTPCR0 IOMEM(0xe6150130)
+#define SMSTPCR1 IOMEM(0xe6150134)
+#define SMSTPCR2 IOMEM(0xe6150138)
+#define SMSTPCR3 IOMEM(0xe615013C)
+#define SMSTPCR4 IOMEM(0xe6150140)
/* Fixed 32 KHz root clock from EXTALR pin */
static struct clk r_clk = {