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authorZheng Yan <zheng.z.yan@intel.com>2012-06-23 10:23:49 +0800
committerBjorn Helgaas <bhelgaas@google.com>2012-06-23 10:47:47 -0600
commit71a83bd727cc31c5fe960c3758cb396267ff710e (patch)
treec4655a683b386c98d7c85bddd019e67711310c71 /drivers/pci/pci.c
parentee85f543710dd56ce526cb44e39191f32972e5ad (diff)
PCI/PM: add runtime PM support to PCIe port
This patch adds runtime PM support to PCIe port. This is needed by PCIe D3cold support, where PCIe device without ACPI node may be powered on/off by PCIe port. Because runtime suspend is broken for some chipsets, a black list is used to disable runtime PM support for these chipsets. Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Zheng Yan <zheng.z.yan@intel.com> Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r--drivers/pci/pci.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 447e83472c0..9eae64b1795 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1518,6 +1518,16 @@ static void pci_pme_list_scan(struct work_struct *work)
if (!list_empty(&pci_pme_list)) {
list_for_each_entry_safe(pme_dev, n, &pci_pme_list, list) {
if (pme_dev->dev->pme_poll) {
+ struct pci_dev *bridge;
+
+ bridge = pme_dev->dev->bus->self;
+ /*
+ * If bridge is in low power state, the
+ * configuration space of subordinate devices
+ * may be not accessible
+ */
+ if (bridge && bridge->current_state != PCI_D0)
+ continue;
pci_pme_wakeup(pme_dev->dev, NULL);
} else {
list_del(&pme_dev->list);