diff options
author | Dave Jones <davej@redhat.com> | 2011-02-22 01:59:48 -0500 |
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committer | Dave Jones <davej@redhat.com> | 2011-02-22 01:59:48 -0500 |
commit | 8e3264af6716276a99ca1588413abdd97a713074 (patch) | |
tree | 8aee3f750f2f628f3863ed45b20b0f0bfe2fc975 | |
parent | e0beb81b01f5975027075839adc72fcd25baf211 (diff) |
cleanup the todo a little
-rw-r--r-- | TODO | 45 |
1 files changed, 19 insertions, 26 deletions
@@ -1,41 +1,34 @@ +higher priority stuff +--------------------- - Don't output same info more than once on SMP, just make a note that there are N identical CPUs. - - feature flag handling code could use more cleanup. - - Make intel cache sizing use cpuid(4) where present. +- After identifying CPU we can associate more info with the CPU. + - CPU codename + - Introduction date + - number of transistors + - voltages (I/O, Core, Maximum) + - number of pipelines +- Be able to tell the user when we have failed to identify the chip, so they can send us information! +- Add some additional tools, rename package to 'x86utils' ? + - Report north bridge info (requires pci lib) -- Fix benchmarking - -- introduce hexdump option (-x) to dump register values in addition to decoding. - -- Identify Transmeta CPUs. - -- Decode mtrr registers as well as dumping them - -- Dump cyrix ARR registers when we pass --mtrr - -- --apic - Dump APIC registers -- --gcc option to output best optimisation parameters for that CPU. +medium priority stuff +--------------------- +- introduce hexdump option (-x) to dump register values in addition to decoding. - Some CPUs allow the name string to be changed. If this has happened we die horribly. We need to store the current name string, perform the cpuid reset sequence, and restore the name string on exit. +- Fix benchmarking -- After identifying CPU we can associate more info with the CPU. - - CPU codename - - Introduction date - - number of transistors - - voltages (I/O, Core, Maximum) - - number of pipelines +low priority stuff +------------------ +- Identify Transmeta CPUs. +- Dump cyrix ARR registers when we pass --mtrr - review code for extended natsemi support. -- report L3 (chipset) caches (requires PCI poking) - -- libx86info for other apps - -- Be able to tell the user when we have failed to identify the chip, so they can send us information! |