diff options
author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-29 23:01:41 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-29 23:01:41 +0000 |
commit | e6afc2f4b9a93403b20cad9cecb05478f9067ea2 (patch) | |
tree | 81b1a2834472096044de1ed16e6888e9652222f5 /target-sh4 | |
parent | 1000822b03f44cc0b0e624cd60e5dce8dde7d463 (diff) |
SH4: convert a few helpers to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5112 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sh4')
-rw-r--r-- | target-sh4/helper.h | 6 | ||||
-rw-r--r-- | target-sh4/op.c | 41 | ||||
-rw-r--r-- | target-sh4/op_helper.c | 39 | ||||
-rw-r--r-- | target-sh4/translate.c | 24 |
4 files changed, 52 insertions, 58 deletions
diff --git a/target-sh4/helper.h b/target-sh4/helper.h index 60addabeb..4d0e269ce 100644 --- a/target-sh4/helper.h +++ b/target-sh4/helper.h @@ -2,3 +2,9 @@ #define DEF_HELPER(ret, name, params) ret name params; #endif +DEF_HELPER(void, helper_ldtlb, (void)) +DEF_HELPER(void, helper_raise_illegal_instruction, (void)) +DEF_HELPER(void, helper_raise_slot_illegal_instruction, (void)) +DEF_HELPER(void, helper_debug, (void)) +DEF_HELPER(void, helper_sleep, (void)) +DEF_HELPER(void, helper_trapa, (uint32_t)) diff --git a/target-sh4/op.c b/target-sh4/op.c index 687bded95..d6bb5203b 100644 --- a/target-sh4/op.c +++ b/target-sh4/op.c @@ -37,12 +37,6 @@ static inline void cond_t(int cond) clr_t(); } -void OPPROTO op_ldtlb(void) -{ - helper_ldtlb(); - RETURN(); -} - void OPPROTO op_frchg(void) { env->fpscr ^= FPSCR_FR; @@ -178,14 +172,6 @@ void OPPROTO op_subv_T0_T1(void) RETURN(); } -void OPPROTO op_trapa(void) -{ - env->tra = PARAM1 << 2; - env->exception_index = 0x160; - do_raise_exception(); - RETURN(); -} - void OPPROTO op_ldcl_rMplus_rN_bank(void) { env->gregs[PARAM2] = env->gregs[PARAM1]; @@ -491,33 +477,6 @@ void OPPROTO op_movl_FT0_fpul(void) RETURN(); } -void OPPROTO op_raise_illegal_instruction(void) -{ - env->exception_index = 0x180; - do_raise_exception(); - RETURN(); -} - -void OPPROTO op_raise_slot_illegal_instruction(void) -{ - env->exception_index = 0x1a0; - do_raise_exception(); - RETURN(); -} - -void OPPROTO op_debug(void) -{ - env->exception_index = EXCP_DEBUG; - cpu_loop_exit(); -} - -void OPPROTO op_sleep(void) -{ - env->halted = 1; - env->exception_index = EXCP_HLT; - cpu_loop_exit(); -} - /* Load and store */ #define MEMSUFFIX _raw #include "op_mem.c" diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c index 8c8318f1e..850411540 100644 --- a/target-sh4/op_helper.c +++ b/target-sh4/op_helper.c @@ -20,11 +20,6 @@ #include <assert.h> #include "exec.h" -void do_raise_exception(void) -{ - cpu_loop_exit(); -} - #ifndef CONFIG_USER_ONLY #define MMUSUFFIX _mmu @@ -64,7 +59,7 @@ void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr) cpu_restore_state(tb, env, pc, NULL); } } - do_raise_exception(); + cpu_loop_exit(); } env = saved_env; } @@ -81,6 +76,38 @@ void helper_ldtlb(void) #endif } +void helper_raise_illegal_instruction(void) +{ + env->exception_index = 0x180; + cpu_loop_exit(); +} + +void helper_raise_slot_illegal_instruction(void) +{ + env->exception_index = 0x1a0; + cpu_loop_exit(); +} + +void helper_debug(void) +{ + env->exception_index = EXCP_DEBUG; + cpu_loop_exit(); +} + +void helper_sleep(void) +{ + env->halted = 1; + env->exception_index = EXCP_HLT; + cpu_loop_exit(); +} + +void helper_trapa(uint32_t tra) +{ + env->tra = tra << 2; + env->exception_index = 0x160; + cpu_loop_exit(); +} + void helper_addc_T0_T1(void) { uint32_t tmp0, tmp1; diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 87c3f43ac..19486d7a1 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -248,7 +248,7 @@ static void gen_goto_tb(DisasContext * ctx, int n, target_ulong dest) } else { tcg_gen_movi_i32(cpu_pc, dest); if (ctx->singlestep_enabled) - gen_op_debug(); + tcg_gen_helper_0_0(helper_debug); tcg_gen_exit_tb(0); } } @@ -260,7 +260,7 @@ static void gen_jump(DisasContext * ctx) delayed jump as immediate jump are conditinal jumps */ tcg_gen_mov_i32(cpu_pc, cpu_delayed_pc); if (ctx->singlestep_enabled) - gen_op_debug(); + tcg_gen_helper_0_0(helper_debug); tcg_gen_exit_tb(0); } else { gen_goto_tb(ctx, 0, ctx->delayed_pc); @@ -368,7 +368,7 @@ static inline void gen_store_flags(uint32_t flags) #define CHECK_NOT_DELAY_SLOT \ if (ctx->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) \ - {gen_op_raise_slot_illegal_instruction (); ctx->bstate = BS_EXCP; \ + {tcg_gen_helper_0_0(helper_raise_slot_illegal_instruction); ctx->bstate = BS_EXCP; \ return;} void _decode_opc(DisasContext * ctx) @@ -400,7 +400,7 @@ void _decode_opc(DisasContext * ctx) #if defined(CONFIG_USER_ONLY) assert(0); /* XXXXX */ #else - gen_op_ldtlb(); + tcg_gen_helper_0_0(helper_ldtlb); #endif return; case 0x002b: /* rte */ @@ -428,9 +428,9 @@ void _decode_opc(DisasContext * ctx) return; case 0x001b: /* sleep */ if (ctx->memidx) { - gen_op_sleep(); + tcg_gen_helper_0_0(helper_sleep); } else { - gen_op_raise_illegal_instruction(); + tcg_gen_helper_0_0(helper_raise_illegal_instruction); ctx->bstate = BS_EXCP; } return; @@ -1060,8 +1060,10 @@ void _decode_opc(DisasContext * ctx) gen_op_stb_T0_T1(ctx); return; case 0xc300: /* trapa #imm */ - CHECK_NOT_DELAY_SLOT tcg_gen_movi_i32(cpu_pc, ctx->pc); - gen_op_trapa(B7_0); + CHECK_NOT_DELAY_SLOT + tcg_gen_movi_i32(cpu_pc, ctx->pc); + tcg_gen_movi_i32(cpu_T[0], B7_0); + tcg_gen_helper_0_1(helper_trapa, cpu_T[0]); ctx->bstate = BS_BRANCH; return; case 0xc800: /* tst #imm,R0 */ @@ -1355,7 +1357,7 @@ void _decode_opc(DisasContext * ctx) fprintf(stderr, "unknown instruction 0x%04x at pc 0x%08x\n", ctx->opcode, ctx->pc); - gen_op_raise_illegal_instruction(); + tcg_gen_helper_0_0(helper_raise_illegal_instruction); ctx->bstate = BS_EXCP; } @@ -1434,7 +1436,7 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb, if (ctx.pc == env->breakpoints[i]) { /* We have hit a breakpoint - make sure PC is up-to-date */ tcg_gen_movi_i32(cpu_pc, ctx.pc); - gen_op_debug(); + tcg_gen_helper_0_0(helper_debug); ctx.bstate = BS_EXCP; break; } @@ -1475,7 +1477,7 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb, if (tb->cflags & CF_LAST_IO) gen_io_end(); if (env->singlestep_enabled) { - gen_op_debug(); + tcg_gen_helper_0_0(helper_debug); } else { switch (ctx.bstate) { case BS_STOP: |