diff options
author | Blue Swirl <blauwirbel@gmail.com> | 2012-04-28 08:57:56 +0000 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2012-04-28 08:57:56 +0000 |
commit | c4c50b9edd61140af5112b196b75057ab5d98b4e (patch) | |
tree | ca6979c366dbff0a032e992f41a8f83dd67df454 /hw | |
parent | 2ff0f668512bde20ef9e7ee3216ccc353830e6fd (diff) | |
parent | 10962fd510bb381acc6694156bd675e5d86f32d8 (diff) |
Merge branch 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
target-arm: Make SETEND respect bswap_code (BE8) setting
target-arm: Move A9 config_base_address reset value to ARMCPU
target-arm: Change cpu_arm_init() return type to ARMCPU
Diffstat (limited to 'hw')
-rw-r--r-- | hw/highbank.c | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/hw/highbank.c b/hw/highbank.c index 906eed5a4..4d6d728a2 100644 --- a/hw/highbank.c +++ b/hw/highbank.c @@ -35,12 +35,6 @@ #define NIRQ_GIC 160 /* Board init. */ -static void highbank_cpu_reset(void *opaque) -{ - CPUARMState *env = opaque; - - env->cp15.c15_config_base_address = GIC_BASE_ADDR; -} static void hb_write_secondary(CPUARMState *env, const struct arm_boot_info *info) { @@ -213,14 +207,17 @@ static void highbank_init(ram_addr_t ram_size, } for (n = 0; n < smp_cpus; n++) { - env = cpu_init(cpu_model); - if (!env) { + ARMCPU *cpu; + cpu = cpu_arm_init(cpu_model); + if (cpu == NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } + env = &cpu->env; + /* This will become a QOM property eventually */ + cpu->reset_cbar = GIC_BASE_ADDR; irqp = arm_pic_init_cpu(env); cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ]; - qemu_register_reset(highbank_cpu_reset, env); } sysmem = get_system_memory(); |