diff options
author | Yang Rong <rong.r.yang@intel.com> | 2013-10-11 13:50:07 +0800 |
---|---|---|
committer | Zhigang Gong <zhigang.gong@linux.intel.com> | 2013-10-22 14:16:09 +0800 |
commit | 4cb7866c1e4503d3b607eb723aaa01feb3971f34 (patch) | |
tree | 56772ec41180d4a7f5ee3b8f22f70c7603cc47f1 | |
parent | 4c0fbcd7f54feeaa718462ce5727640b0fa89da7 (diff) |
Refine vector register deallocate.
Split vector registers block, so can free them seperate.
Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Reviewed-by: Ruiling Song <ruiling.song@intel.com>
-rw-r--r-- | backend/src/backend/gen_reg_allocation.cpp | 47 |
1 files changed, 3 insertions, 44 deletions
diff --git a/backend/src/backend/gen_reg_allocation.cpp b/backend/src/backend/gen_reg_allocation.cpp index c4cad40b..30f9e387 100644 --- a/backend/src/backend/gen_reg_allocation.cpp +++ b/backend/src/backend/gen_reg_allocation.cpp @@ -88,8 +88,6 @@ namespace gbe map<ir::Register, VectorLocation> vectorMap; /*! All vectors used in the selection */ vector<SelectionVector*> vectors; - /*! All vectors that are already expired */ - set<SelectionVector*> expired; /*! The set of booleans that will go to GRF (cannot be kept into flags) */ set<ir::Register> grfBooleans; /*! All the register intervals */ @@ -310,28 +308,9 @@ namespace gbe continue; } // Case 1 - it does not belong to a vector. Just remove it - if (vectorMap.contains(reg) == false) { ctx.deallocate(it->second); this->expiringID++; return true; - // Case 2 - check that the vector has not been already removed. If not, - // since we equaled the intervals of all registers in the vector, we just - // remove the complete vector - } else { - SelectionVector *vector = vectorMap.find(reg)->second.first; - if (expired.contains(vector)) { - this->expiringID++; - continue; - } else { - const ir::Register first = vector->reg[0].reg(); - auto it = RA.find(first); - GBE_ASSERT(it != RA.end()); - ctx.deallocate(it->second); - expired.insert(vector); - this->expiringID++; - return true; - } - } } // We were not able to expire anything @@ -541,11 +520,12 @@ namespace gbe } continue; } - for (uint32_t regID = 0; regID < vector->regNum; ++regID, grfOffset += alignment) { + for (uint32_t regID = 0; regID < vector->regNum; ++regID) { const ir::Register reg = vector->reg[regID].reg(); GBE_ASSERT(RA.contains(reg) == false && ctx.sel->getRegisterData(reg).family == family); - RA.insert(std::make_pair(reg, grfOffset)); + RA.insert(std::make_pair(reg, grfOffset + alignment * regID)); + ctx.splitBlock(grfOffset, alignment * regID); //splitBlock will not split if regID == 0 } } // Case 2: This is a regular scalar register, allocate it alone @@ -649,27 +629,6 @@ namespace gbe } } - // Extend the liveness of the registers that belong to vectors. Actually, - // this is way too brutal, we should instead maintain a list of allocated - // intervals to handle vector registers independently while doing the linear - // scan (or anything else) - for (auto vector : this->vectors) { - const uint32_t regNum = vector->regNum; - const ir::Register first = vector->reg[0].reg(); - int32_t minID = this->intervals[first].minID; - int32_t maxID = this->intervals[first].maxID; - for (uint32_t regID = 1; regID < regNum; ++regID) { - const ir::Register reg = vector->reg[regID].reg(); - minID = std::min(minID, this->intervals[reg].minID); - maxID = std::max(maxID, this->intervals[reg].maxID); - } - for (uint32_t regID = 0; regID < regNum; ++regID) { - const ir::Register reg = vector->reg[regID].reg(); - this->intervals[reg].minID = minID; - this->intervals[reg].maxID = maxID; - } - } - // Sort both intervals in starting point and ending point increasing orders const uint32_t regNum = ctx.sel->getRegNum(); this->starting.resize(regNum); |