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authorZhigang Gong <zhigang.gong@linux.intel.com>2013-10-22 15:06:32 +0800
committerZhigang Gong <zhigang.gong@linux.intel.com>2013-10-22 15:06:32 +0800
commit2bc1af2c9ea2b48dd55699bb99b99350d0fc0762 (patch)
treee853093d23352af823c89e4a31919701ed8a7913
parent8a97d70d650dd60d3643e6f73307c23a8505b0ff (diff)
Bump to version 0.3.
Also update some documents accordingly. Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
-rw-r--r--CMakeLists.txt2
-rw-r--r--docs/Beignet.mdwn5
-rw-r--r--docs/Beignet/Backend/TODO.mdwn9
3 files changed, 2 insertions, 14 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 3d18f500..2ec6c089 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -9,7 +9,7 @@
CMAKE_MINIMUM_REQUIRED(VERSION 2.6.0)
PROJECT(OCL)
set (LIBCL_DRIVER_VERSION_MAJOR 0)
-set (LIBCL_DRIVER_VERSION_MINOR 2)
+set (LIBCL_DRIVER_VERSION_MINOR 3)
set (LIBCL_C_VERSION_MAJOR 1)
set (LIBCL_C_VERSION_MINOR 1)
diff --git a/docs/Beignet.mdwn b/docs/Beignet.mdwn
index 86a235ea..97b568bf 100644
--- a/docs/Beignet.mdwn
+++ b/docs/Beignet.mdwn
@@ -101,14 +101,9 @@ do:
as clCreateFromGLBuffer,clCreateFromGLRenderbuffer,clGetGLObjectInfo... Currently,
the working APIs are clCreateFromGLTexture,clCreateFromGLTexture2D.
-- Support for events.
-
- Check that NDRangeKernels can be pushed into _different_ queues from several
threads.
-- Support for nonblocking mode Enqueue\*Buffer. Now we only use the map extension to
- implement those Enqueue\*Buffer functions.
-
- No state tracking at all. One batch buffer is created at each "draw call"
(i.e. for each NDRangeKernels). This is really inefficient since some
expensive pipe controls are issued for each batch buffer
diff --git a/docs/Beignet/Backend/TODO.mdwn b/docs/Beignet/Backend/TODO.mdwn
index f14433de..adc7fd28 100644
--- a/docs/Beignet/Backend/TODO.mdwn
+++ b/docs/Beignet/Backend/TODO.mdwn
@@ -31,8 +31,6 @@ many things must be implemented:
- From LLVM 3.3, we use SPIR IR. We need to use the compiler defined type to
represent sampler_t/image2d_t/image1d_t/....
-- Adding support for long (int64).
-
Gen IR
------
@@ -56,17 +54,12 @@ The code is defined in `src/ir`. Main things to do are:
This will obviously impact both instruction selection and the register
allocation.
-- Adding support for long (int64).
-
Backend
-------
The code is defined in `src/backend`. Main things to do are:
-- Int64 support?
-
-- Implementing register spilling (see the [[compiler backend
- description|compiler_backend]] for more details)
+- Optimize register spilling (see the [[compiler backend description|compiler_backend]] for more details)
- Implementing proper instruction selection. A "simple" tree matching algorithm
should provide good results for Gen