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path: root/drivers/hwtracing/coresight/coresight-tmc.h
AgeCommit message (Expand)AuthorFilesLines
2021-10-27coresight: tmc: Configure AXI write burst sizeTanmay Jagdale1-1/+5
2020-09-28coresight: tmc-etr: Add function to register catu opsMian Yousaf Kaukab1-0/+3
2020-07-21coresight: tmc: Add shutdown callback for TMC ETRSai Prakash Ranjan1-0/+1
2019-09-03coresight: tmc: Make memory width mask computation into a functionMathieu Poirier1-0/+1
2019-09-03coresight: tmc-etr: Fix perf_data checkYabin Cui1-3/+3
2019-09-03coresight: tmc-etr: Check if non-secure access is enabledSuzuki K Poulose1-0/+3
2019-09-03coresight: tmc-etr: Handle memory errorsSuzuki K Poulose1-0/+1
2019-06-19coresight: tmc: Clean up device specific dataSuzuki K Poulose1-2/+0
2019-04-25coresight: tmc-etr: Add support for CPU-wide trace scenariosMathieu Poirier1-0/+3
2019-04-25coresight: tmc-etr: Introduce the notion of IDR to ETR devicesMathieu Poirier1-0/+6
2019-04-25coresight: tmc-etr: Introduce the notion of reference counting to ETR devicesMathieu Poirier1-0/+3
2018-09-25coresight: etm-perf: Add support for ETR backendSuzuki K Poulose1-0/+2
2018-09-25coresight: tmc-etr: Handle driver mode specific ETR buffersSuzuki K Poulose1-0/+2
2018-07-15coresight: catu: Plug in CATU as a backend for ETR bufferSuzuki K Poulose1-0/+3
2018-07-15coresight: tmc-etr buf: Add TMC scatter gather mode backendSuzuki K Poulose1-0/+1
2018-07-15coresight: tmc-etr: Add transparent buffer managementSuzuki K Poulose1-9/+46
2018-07-15coresight: Add generic TMC sg table frameworkSuzuki K Poulose1-0/+50
2018-07-15coresight: tmc: Hide trace buffer handling for file readSuzuki K Poulose1-0/+4
2018-05-14coresight: Moving framework and drivers to SPDX identifierMathieu Poirier1-12/+1
2017-08-28coresight tmc: Add support for Coresight SoC 600 TMCSuzuki K Poulose1-0/+4
2017-08-28coresight tmc: Support for save-restore in ETRSuzuki K Poulose1-0/+9
2017-08-28coresight tmc etr: Setup AXI cache encoding for read transfersSuzuki K Poulose1-1/+9
2017-08-28coresight tmc etr: Cleanup AXICTL register handlingSuzuki K Poulose1-1/+16
2017-08-28coresight tmc etr: Detect address width at runtimeSuzuki K Poulose1-0/+4
2017-08-28coresight tmc: Detect support for scatter gatherSuzuki K Poulose1-0/+5
2017-08-28coresight tmc etr: Add capabilitiy informationSuzuki K Poulose1-0/+20
2017-08-28coresight tmc: Add helpers for accessing 64bit registersSuzuki K Poulose1-0/+18
2016-11-29coresight: tmc: Cleanup operation mode handlingSuzuki K. Poulose1-1/+1
2016-08-31coresight: tmc: Limit the trace to available dataSuzuki K Poulose1-1/+3
2016-05-03coresight: tmc: implementing TMC-ETF AUX space APIMathieu Poirier1-0/+1
2016-05-03coresight: tmc: keep track of memory widthMathieu Poirier1-4/+6
2016-05-03coresight: tmc: adding mode of operation for link/sinksMathieu Poirier1-2/+2
2016-05-03coresight: tmc: getting rid of multiple read accessMathieu Poirier1-2/+0
2016-05-03coresight: tmc: making prepare/unprepare functions genericMathieu Poirier1-4/+4
2016-05-03coresight: tmc: splitting driver in ETB/ETF and ETR componentsMathieu Poirier1-0/+18
2016-05-03coresight: tmc: cleaning up header fileMathieu Poirier1-3/+2
2016-05-03coresight: tmc: introducing new header fileMathieu Poirier1-0/+122
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