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2006-06-19[MIPS] Remove prototype for non-existing function.Ralf Baechle1-1/+0
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-06[MIPS] Fix sparsemem support.Chad Reese1-1/+1
Move memory_present() in arch/mips/kernel/setup.c. When using sparsemem extreme, this function does an allocate for bootmem. This would always fail since init_bootmem hasn't been called yet. Move memory_present after free_bootmem. This only marks actual memory ranges as present instead of the entire address space. Signed-off-by: Chad Reese <creese@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-06[MIPS] Save write-only Config.OD from being clobberedSergei Shtylyov1-0/+34
Save the Config.OD bit from being clobbered by coherency_setup(). This bit, when set, fixes various errata in the early steppings of Au1x00 SOCs. Unfortunately, the bit was write-only on the most early of them. In addition, also restore the bit after a wakeup from sleep. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-01[MIPS] Treat R14000 like R10000.Kumba3-0/+6
Signed-off-by: Joshua Kinard <kumba@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-01[MIPS] Fix deadlock on MP with cache aliases.Ralf Baechle1-9/+30
A proper fix would involve introducing the notion of shared caches but at this stage of 2.6.17 that's going to be too intrusive and not needed for current hardware; aside I think some discussion will be needed. So for now on the affected SMP configurations which happen to suffer from cache aliases we make use of the fact that a single cache will be shared by all processors. This solves the deadlock issue and will improve performance by getting rid of the smp_call_function overhead. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-01[MIPS] Fix detection and handling of the 74K processor.Chris Dearman1-0/+1
Nothing exciting; Linux just didn't know it yet so this is most adding a value to a case statement. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-01[MIPS] Add missing 34K processor IDsNigel Stephens1-0/+1
The 34K is very much like a 24K on steroids. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] Use __ffs() instead of ffs() for waybit calculation.Atsushi Nemoto2-9/+9
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] Handle IDE PIO cache aliases on SMP.Ralf Baechle5-0/+15
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] MT: Improved multithreading support.Ralf Baechle3-40/+141
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] Fix tx49_blast_icache32_page_indexed.Atsushi Nemoto1-1/+2
Fix the cache index value in tx49_blast_icache32_page_indexed(). This is a damage by de62893bc0725f8b5f0445250577cd7a10b2d8f8 commit. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] Fix CONFIG_LIMITED_DMA build.Ralf Baechle1-0/+2
This fix a build error for the Momentum Jaguar ATX eval board. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] Fix vectored interrupt support in TLB exception handler generator.Ralf Baechle1-2/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] Cleanup free_initmem the same way as i386 did.Ralf Baechle1-25/+23
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-27[PATCH] unify PFN_* macrosDave Hansen1-3/+1
Just about every architecture defines some macros to do operations on pfns. They're all virtually identical. This patch consolidates all of them. One minor glitch is that at least i386 uses them in a very skeletal header file. To keep away from #include dependency hell, I stuck the new definitions in a new, isolated header. Of all of the implementations, sh64 is the only one that varied by a bit. It used some masks to ensure that any sign-extension got ripped away before the arithmetic is done. This has been posted to that sh64 maintainers and the development list. Compiles on x86, x86_64, ia64 and ppc64. Signed-off-by: Dave Hansen <haveblue@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-24[PATCH] s/;;/;/gAlexey Dobriyan1-3/+3
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-22[PATCH] remove set_page_count() outside mm/Nick Piggin1-3/+3
set_page_count usage outside mm/ is limited to setting the refcount to 1. Remove set_page_count from outside mm/, and replace those users with init_page_count() and set_page_refcounted(). This allows more debug checking, and tighter control on how code is allowed to play around with page->_count. Signed-off-by: Nick Piggin <npiggin@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-22[PATCH] mm: split highorder pagesNick Piggin1-2/+3
Have an explicit mm call to split higher order pages into individual pages. Should help to avoid bugs and be more explicit about the code's intention. Signed-off-by: Nick Piggin <npiggin@suse.de> Cc: Russell King <rmk@arm.linux.org.uk> Cc: David Howells <dhowells@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-21[MIPS] TX49XX has prefetch.Atsushi Nemoto2-2/+9
The TX49XX has the prefetch instruction. It supports only Pref_Load (hint 0). Actually changes in this patch except for Kconfig are not have any effects, I added these changes to prevent misuse of unsupported hints. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21[MIPS] Kill tlb-andes.c.Thiemo Seufer3-260/+6
Basically identical to c-r4k.c, so maintaining one is really enough. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21[MIPS] War on whitespace: cleanup initial spaces followed by tabs.Ralf Baechle1-9/+9
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21[MIPS] Remove CONFIG_BUILD_ELF64.Ralf Baechle1-13/+0
This option is no longer usable with supported compilers. It will be replaced by usage of -msym32 in a separate patch. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21[MIPS] sc-rm7k.c cleanupAtsushi Nemoto1-16/+9
Use blast_scache_range, blast_inv_scache_range for rm7k scache routine. Output code should be logically same. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-18[MIPS] local_r4k_flush_cache_page fixAtsushi Nemoto2-5/+9
If dcache_size != icache_size or dcache_size != scache_size, or set-associative cache, icache/scache does not flushed properly. Make blast_?cache_page_indexed() masks its index value correctly. Also, use physical address for physically indexed pcache/scache. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-09[MIPS] Scatter a bunch of __init over tlbex.c.Ralf Baechle1-17/+17
Found by make buildcheck. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-28[MIPS] Initialize S-cache function pointers even on S-cache-less CPUs.Ralf Baechle1-5/+11
When a CPU has no scache, the scache flushing functions currently aren't getting initialized and the NULL pointer is eventually called as a function. Initialize the scache flushing functions as a noop when there's no scache. Initial patch by me and most of the debugging done by Martin Michlmayr. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-21[MIPS] Sibyte: #if CONFIG_* doesn't fly.Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14[MIPS] Add protected_blast_icache_range, blast_icache_range, etc.Atsushi Nemoto2-151/+23
Add blast_xxx_range(), protected_blast_xxx_range() etc. for common use. They are built by __BUILD_BLAST_CACHE_RANGE(). Use protected_cache_op() macro for various protected_ routines. Output code should be logically same. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07[MIPS] Support /proc/kcore for MIPSDaniel Jacobowitz1-0/+16
I'm pretty sure that the CKSEG0 bits are wrong, but I did need to cover that region - because the SB-1 kernel links at 0xffffffff80100000 or so, disassembly and printing static variables don't work unless the debugger can read that region. Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07[MIPS] Remove wrong __user tags.Atsushi Nemoto2-7/+5
This fixes sparse warnings 'dereference of noderef expression'. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.Ralf Baechle1-2/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-12-12[PATCH] mips: setup_zero_pages count 1Hugh Dickins1-2/+2
Page count should be initialized to 1 on each of the MIPS empty zero pages, to avoid a bad_page warning whenever one of them is freed from all mappings. Signed-off-by: Hugh Dickins <hugh@veritas.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-01[MIPS] Use reset_page_mapcount to initialize empty_zero_page usage counter.Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29[PATCH] mm: init_mm without ptlockHugh Dickins1-3/+1
First step in pushing down the page_table_lock. init_mm.page_table_lock has been used throughout the architectures (usually for ioremap): not to serialize kernel address space allocation (that's usually vmlist_lock), but because pud_alloc,pmd_alloc,pte_alloc_kernel expect caller holds it. Reverse that: don't lock or unlock init_mm.page_table_lock in any of the architectures; instead rely on pud_alloc,pmd_alloc,pte_alloc_kernel to take and drop it when allocating a new one, to check lest a racing task already did. Similarly no page_table_lock in vmalloc's map_vm_area. Some temporary ugliness in __pud_alloc and __pmd_alloc: since they also handle user mms, which are converted only by a later patch, for now they have to lock differently according to whether or not it's init_mm. If sources get muddled, there's a danger that an arch source taking init_mm.page_table_lock will be mixed with common source also taking it (or neither take it). So break the rules and make another change, which should break the build for such a mismatch: remove the redundant mm arg from pte_alloc_kernel (ppc64 scrapped its distinct ioremap_mm in 2.6.13). Exceptions: arm26 used pte_alloc_kernel on user mm, now pte_alloc_map; ia64 used pte_alloc_map on init_mm, now pte_alloc_kernel; parisc had bad args to pmd_alloc and pte_alloc_kernel in unused USE_HPPA_IOREMAP code; ppc64 map_io_page forgot to unlock on failure; ppc mmu_mapin_ram and ppc64 im_free took page_table_lock for no good reason. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-29SB1 cache exception handling.Andrew Isaacson2-8/+51
Expand SB1 cache error handling by adding SB1_CEX_ALWAYS_FATAL and SB1_CEX_STALL, allowing configurable behavior on cache errors. Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Add support for SB1A CPU.Andrew Isaacson1-0/+1
Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Fix zero length sys_cacheflushAtsushi Nemoto1-0/+2
Cacheflush(0, 0, 0) was crashing the system. This is because flush_icache_range(start, end) tries to flushing whole address space (0 - ~0UL) if both start and end are zero. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Rename page argument of flush_cache_page to something more descriptive.Ralf Baechle1-16/+17
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Fix wrong comment.Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Fixup a few lose ends in explicit support for MIPS R1/R2.Ralf Baechle1-2/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Don't copy SB1 cache error handler to uncached memory.Ralf Baechle1-1/+0
This may have made sense on a paranoid day with pass 1 BCM1250 processors that were throwing cache error exception left and right for no good reason. On modern silicion that hardly makes sense and the code had gotten just an obscurity ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Fix stale comment in c-sb1.c.Andrew Isaacson1-1/+1
Signed-Off-By: Andrew Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Cleanup the mess in cpu_cache_init.Ralf Baechle5-54/+44
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Use R4000 TLB routines for SB1 also.Ralf Baechle2-386/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Sync c-tx39.c with c-r4k.c.Atsushi Nemoto1-4/+5
tx39_flush_cache_range() does nothing if !cpu_has_dc_aliases. It should flush d-cache and invalidate i-cache since the TX39(H2) has separate I/D cache. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Add/Fix missing bit of R4600 hit cacheop workaround.Thiemo Seufer2-1/+2
Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Minor code cleanup.Thiemo Seufer1-15/+15
Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29R4600 v2.0 needs a nop before tlbp.Thiemo Seufer1-0/+2
Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Don't set up a sg dma address if we have no page address for some reason.Thiemo Seufer1-38/+8
Code cleanup. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29More .set push/pop.Thiemo Seufer1-2/+2
Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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