diff options
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2013-12-18 11:19:55 -0200 |
|---|---|---|
| committer | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2014-02-26 18:42:36 -0300 |
| commit | e0ba61242a22789f74d8fef17e6dd5e1acd396ca (patch) | |
| tree | 253a3c00e7bed79dd19794fe801ca0fd49e1cb88 | |
| parent | 8200173a0d2b38fa7233765b255127fa81143a59 (diff) | |
drm/i915: remove dev_priv->pc8.enabled
It was just being used on debugfs and on a WARN inside
hsw_set_power_well. But now that we PC8 is part of runtime PM and we
get/put runtime PM when we get/put any power domain, we shouldn't need
the WARN anymore.
v2: - Rebase.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
4 files changed, 0 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 401d6bc568ff..6ffb29e534f6 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2017,7 +2017,6 @@ static int i915_pc8_status(struct seq_file *m, void *unused) seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy)); seq_printf(m, "IRQs disabled: %s\n", yesno(dev_priv->pc8.irqs_disabled)); - seq_printf(m, "Enabled: %s\n", yesno(dev_priv->pc8.enabled)); mutex_unlock(&dev_priv->pc8.lock); return 0; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 4518f462cb70..9bac6f3ab8a5 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1369,8 +1369,6 @@ struct ilk_wm_values { */ struct i915_package_c8 { bool irqs_disabled; - /* Only true after the delayed work task actually enables it. */ - bool enabled; struct mutex lock; struct { diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 62261d7b1d3c..25ca2d7fba01 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6660,8 +6660,6 @@ void __hsw_do_enable_pc8(struct drm_i915_private *dev_priv) DRM_DEBUG_KMS("Enabling package C8+\n"); - dev_priv->pc8.enabled = true; - if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) { val = I915_READ(SOUTH_DSPCLK_GATE_D); val &= ~PCH_LP_PARTITION_LEVEL_DISABLE; @@ -6697,7 +6695,6 @@ void __hsw_do_disable_pc8(struct drm_i915_private *dev_priv) mutex_lock(&dev_priv->rps.hw_lock); gen6_update_ring_freq(dev); mutex_unlock(&dev_priv->rps.hw_lock); - dev_priv->pc8.enabled = false; } #define for_each_power_domain(domain, mask) \ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 9c9c7beb4097..42c5288f8d76 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5321,8 +5321,6 @@ static void hsw_set_power_well(struct drm_device *dev, bool is_enabled, enable_requested; uint32_t tmp; - WARN_ON(dev_priv->pc8.enabled); - tmp = I915_READ(HSW_PWR_WELL_DRIVER); is_enabled = tmp & HSW_PWR_WELL_STATE_ENABLED; enable_requested = tmp & HSW_PWR_WELL_ENABLE_REQUEST; @@ -5816,7 +5814,6 @@ void intel_pm_setup(struct drm_device *dev) mutex_init(&dev_priv->pc8.lock); dev_priv->pc8.irqs_disabled = false; - dev_priv->pc8.enabled = false; INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work, intel_gen6_powersave_work); } |