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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2014-02-21 18:11:15 -0300
committerPaulo Zanoni <paulo.r.zanoni@intel.com>2014-02-26 18:42:26 -0300
commitc5683ff25c6e40d4bfe856930e40f67e7bdf6e28 (patch)
tree6b4dc1330789d17f7b7baceac45ae62f8dc78902
parent45aec781215018237cbaa87fe66c8071bd373985 (diff)
drm/i915: add unclaimed register checks to BDW
Just like we do to Haswell. v2: - Rebase. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c2
-rw-r--r--drivers/gpu/drm/i915/intel_uncore.c2
2 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 429434d40f93..61f34e121286 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -266,6 +266,7 @@ static const struct intel_device_info intel_broadwell_d_info = {
.has_llc = 1,
.has_ddi = 1,
.has_fbc = 1,
+ .has_fpga_dbg = 1,
GEN_DEFAULT_PIPEOFFSETS,
};
@@ -276,6 +277,7 @@ static const struct intel_device_info intel_broadwell_m_info = {
.has_llc = 1,
.has_ddi = 1,
.has_fbc = 1,
+ .has_fpga_dbg = 1,
GEN_DEFAULT_PIPEOFFSETS,
};
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 98ab00825a7f..f67884a70add 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -654,6 +654,7 @@ static bool is_gen8_shadowed(struct drm_i915_private *dev_priv, u32 reg)
static void \
gen8_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
REG_WRITE_HEADER; \
+ hsw_unclaimed_reg_clear(dev_priv, reg); \
if (reg < 0x40000 && !is_gen8_shadowed(dev_priv, reg)) { \
if (dev_priv->uncore.forcewake_count == 0) \
dev_priv->uncore.funcs.force_wake_get(dev_priv, \
@@ -665,6 +666,7 @@ gen8_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace
} else { \
__raw_i915_write##x(dev_priv, reg, val); \
} \
+ hsw_unclaimed_reg_check(dev_priv, reg); \
REG_WRITE_FOOTER; \
}