diff options
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2014-02-26 16:30:48 -0300 |
|---|---|---|
| committer | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2014-02-26 18:42:39 -0300 |
| commit | 3ea7d9d823b49af2df63ddb92a76b01239b635d9 (patch) | |
| tree | 339de886f3526bfc0e69dfb4f29d413f466fbdd0 | |
| parent | 6955649596cf5bf4d18fe1a1bfb16f423d991e10 (diff) | |
drm/i915: only check for irqs_disabled when disabling LCPLL
Because if we keep the current code, we'll get tons of WARNs on
Broadwell, since the code is Haswell-specific.
We could have also added a Broadwell-specific code there, but it's not
really needed since we never disable LCPLL with the hotplug interrupts
still enabled. So keep the easy-and-simple-to-maintain solution until
we actually need something else.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3e62dd0c6868..3c11d1e0cbb9 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6511,8 +6511,6 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv) struct drm_device *dev = dev_priv->dev; struct intel_ddi_plls *plls = &dev_priv->ddi_plls; struct intel_crtc *crtc; - unsigned long irqflags; - uint32_t val; list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) WARN(crtc->active, "CRTC for pipe %c enabled\n", @@ -6533,14 +6531,13 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv) "Utility pin enabled\n"); WARN(I915_READ(PCH_GTC_CTL) & PCH_GTC_ENABLE, "PCH GTC enabled\n"); - spin_lock_irqsave(&dev_priv->irq_lock, irqflags); - val = I915_READ(DEIMR); - WARN((val | DE_PCH_EVENT_IVB) != 0xffffffff, - "Unexpected DEIMR bits enabled: 0x%x\n", val); - val = I915_READ(SDEIMR); - WARN((val | SDE_HOTPLUG_MASK_CPT) != 0xffffffff, - "Unexpected SDEIMR bits enabled: 0x%x\n", val); - spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); + /* + * In theory we can still leave IRQs enabled, as long as only the HPD + * interrupts remain enabled. We used to check for that, but since it's + * gen-specific and since we only disable LCPLL after we fully disable + * the interrupts, the check below should be enough. + */ + WARN(!dev_priv->pm.irqs_disabled, "IRQs enabled\n"); } static void hsw_write_dcomp(struct drm_i915_private *dev_priv, uint32_t val) |