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Diffstat (limited to 'linux/r128_drv.h')
-rw-r--r--linux/r128_drv.h15
1 files changed, 14 insertions, 1 deletions
diff --git a/linux/r128_drv.h b/linux/r128_drv.h
index ba11f5b4..9f53746f 100644
--- a/linux/r128_drv.h
+++ b/linux/r128_drv.h
@@ -454,7 +454,8 @@ do { \
#define R128_VERBOSE 0
-#define RING_LOCALS int write; unsigned int tail_mask; volatile u32 *ring;
+#define RING_LOCALS \
+ int write; unsigned int tail_mask; volatile u32 *ring;
#define BEGIN_RING( n ) do { \
if ( R128_VERBOSE ) { \
@@ -470,11 +471,23 @@ do { \
tail_mask = dev_priv->ring.tail_mask; \
} while (0)
+/* You can set this to zero if you want. If the card locks up, you'll
+ * need to keep this set. It works around a bug in early revs of the
+ * Rage 128 chipset, where the CCE would read 32 dwords past the end of
+ * the ring buffer before wrapping around.
+ */
+#define R128_BROKEN_CCE 1
+
#define ADVANCE_RING() do { \
if ( R128_VERBOSE ) { \
DRM_INFO( "ADVANCE_RING() tail=0x%06x wr=0x%06x\n", \
write, dev_priv->ring.tail ); \
} \
+ if ( R128_BROKEN_CCE && write < 32 ) { \
+ memcpy( dev_priv->ring.end, \
+ dev_priv->ring.start, \
+ write * sizeof(u32) ); \
+ } \
r128_flush_write_combine(); \
dev_priv->ring.tail = write; \
R128_WRITE( R128_PM4_BUFFER_DL_WPTR, write ); \