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2014-06-23tcg-ppc64: Move call macros out of tcg-target.hRichard Henderson2-6/+5
These values are private to tcg.c; we don't need to expose this nonsense to the translators. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Make TCG_AREG0 and TCG_REG_CALL_STACK enum constantsRichard Henderson1-35/+11
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Use tcg_out_{ld,st,cmp} internallyRichard Henderson1-19/+14
Rather than using tcg_out32 and opcodes directly. This allows us to remove LD_ADDR and CMP_L macros. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Relax register restrictions in tcg_out_mem_longRichard Henderson1-5/+7
In order to be able to use tcg_out_ld/st sensibly with scratch registers, assert only when we'd incorrectly clobber a scratch. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Move functions aroundRichard Henderson1-361/+361
Code movement only. This will allow us to make use of the other tcg_out_* functions in tidying their implementations. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Avoid some hard-codings of TCG_TYPE_I64Richard Henderson1-10/+13
Using more appropriate _PTR or _REG where possible. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc: Use uintptr_t in ppc_tb_set_jmp_targetRichard Henderson1-1/+1
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-18tcg/optimize: Don't special case TCG_OPF_CALL_CLOBBERRichard Henderson1-5/+4
With the "old" ldst ops we didn't know the real width of the result of the load, but with the "new" ldst ops we do. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-05Merge remote-tracking branch 'remotes/bonzini/softmmu-smap' into stagingPeter Maydell1-13/+0
* remotes/bonzini/softmmu-smap: (33 commits) target-i386: cleanup x86_cpu_get_phys_page_debug target-i386: fix protection bits in the TLB for SMEP target-i386: support long addresses for 4MB pages (PSE-36) target-i386: raise page fault for reserved bits in large pages target-i386: unify reserved bits and NX bit check target-i386: simplify pte/vaddr calculation target-i386: raise page fault for reserved physical address bits target-i386: test reserved PS bit on PML4Es target-i386: set correct error code for reserved bit access target-i386: introduce support for 1 GB pages target-i386: introduce do_check_protect label target-i386: tweak handling of PG_NX_MASK target-i386: commonize checks for PAE and non-PAE target-i386: commonize checks for 4MB and 4KB pages target-i386: commonize checks for 2MB and 4KB pages target-i386: fix coding standards in x86_cpu_handle_mmu_fault target-i386: simplify SMAP handling in MMU_KSMAP_IDX target-i386: fix kernel accesses with SMAP and CPL = 3 target-i386: move check_io helpers to seg_helper.c target-i386: rename KSMAP to KNOSMAP ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-05softmmu: move all load/store functions to cpu_ldst.hPaolo Bonzini1-13/+0
Unify pieces of cpu-all.h, exec-all.h, softmmu_exec.h and tcg/tcg.h into a single new header file with all helpers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-04TCG: Fix tcg_gen_extr_i64_tl for 32bitAlexander Graf1-1/+1
We expose a generic helper "tcg_gen_extr_i64_tl" for 64bit targets, but the same function for 32bit targets is a misnomer and refers to an invalid function name. Fix up the definition to point to the correct internal helper names instead. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-04tcg: Remove TCG_TARGET_HAS_new_ldstRichard Henderson13-234/+28
Since all backends have been converted, remove the compatibility code. Acked-by: Claudio Fontana <claudio.fontana@huawei.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-04tci: Convert to new ldst opcodesRichard Henderson2-47/+31
Tested-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-04tcg-i386: Fix win64 qemu storeRichard Henderson1-1/+2
The first non-register argument isn't placed at offset 0. Cc: qemu-stable@nongnu.org Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg/optimize: Remember garbage high bits for 32-bit opsRichard Henderson1-7/+26
For a 64-bit host, the high bits of a register after a 32-bit operation are undefined. Adjust the temps mask for all 32-bit ops to reflect that. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg/optimize: Move updating of gen_opc_buf into tcg_opt_gen_mov*Richard Henderson1-61/+56
No functional change, just reduce a bit of redundancy. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg-sparc: Make debug_frame constRichard Henderson1-13/+9
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg-s390: Make debug_frame constRichard Henderson1-13/+9
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg-arm: Make debug_frame constRichard Henderson1-13/+9
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg-aarch64: Make debug_frame constRichard Henderson1-13/+9
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg-i386: Make debug_frame constRichard Henderson1-21/+17
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Allow the debug_frame data structure to be constantRichard Henderson1-4/+17
Adjust the FDE to point to the code_buffer after we've copied it to the image, rather than requiring that the backend set it prior. This allows the backend to use read-only storage for its data. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Remove sizemask and flags arguments to tcg_gen_callNRichard Henderson2-12/+9
Take them from the TCGHelperInfo struct instead. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Save flags and computed sizemask in TCGHelperInfoRichard Henderson1-0/+7
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Register the helper info struct rather than the nameRichard Henderson1-2/+5
This will let us find all the info from the hash table. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Inline tcg_gen_helperNRichard Henderson1-7/+0
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Use helper-gen.h in tcg-op.hRichard Henderson1-150/+25
No need to open-code the setup of the builtin helpers. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Push tcg-runtime routines into exec/helper-*Richard Henderson4-52/+31
Rather than special casing them, use the standard mechanisms for tcg helper generation. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-4/+3
Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Optimize brcond2 and setcond2 ne/eqRichard Henderson1-0/+94
If either the high or low pair can be resolved, we can simplify to either a constant or to a 32-bit comparison. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-27Merge remote-tracking branch 'remotes/rth/tcg-mips' into stagingPeter Maydell2-918/+945
* remotes/rth/tcg-mips: (24 commits) tcg-mips: Enable direct chaining of TBs tcg-mips: Simplify movcond tcg-mips: Simplify brcond2 tcg-mips: Improve setcond eq/ne vs zeros tcg-mips: Simplify setcond2 tcg-mips: Simplify brcond tcg-mips: Simplify setcond tcg-mips: Commonize opcode implementations tcg-mips: Improve add2/sub2 tcg-mips: Hoist args loads tcg-mips: Fix subtract immediate range tcg-mips: Name the opcode enumeration tcg-mips: Use EXT for AND on mips32r2 tcg-mips: Use T9 for TCG_TMP1 tcg-mips: Introduce TCG_TMP0, TCG_TMP1 tcg-mips: Rearrange register allocation tcg-mips: Convert to new_ldst tcg-mips: Convert to new qemu_l/st helpers tcg-mips: Move softmmu slow path out of line tcg-mips: Split large ldst offsets ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-24tcg-mips: Enable direct chaining of TBsRichard Henderson1-1/+10
Now that the code_gen_buffer is constrained to not cross 256mb regions, we are assured that we can use J to reach another TB. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Simplify movcondRichard Henderson1-49/+17
Use the same table to fold comparisons as with setcond. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Simplify brcond2Richard Henderson1-57/+20
Emitting a single branch instead of (up to) 3, using setcond2 to generate the composite compare. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Improve setcond eq/ne vs zerosRichard Henderson1-4/+36
The original code results in one too many insns per zero present in the input. And since comparing 64-bit numbers vs zero is common... Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Simplify setcond2Richard Henderson1-64/+31
Using tcg_unsigned_cond and tcg_high_cond. Also, move the function up in the file for future cleanups. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Simplify brcondRichard Henderson1-46/+41
Use the same table to fold comparisons as with setcond. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Simplify setcondRichard Henderson1-58/+67
Use a table to fold comparisons to less-than. Also, move the function up in the file for futher simplifications. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Commonize opcode implementationsRichard Henderson1-114/+98
Most opcodes fall in to one of a couple of patterns. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Improve add2/sub2Richard Henderson1-31/+56
Reduce insn count from 5 to either 3 or 4. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Hoist args loadsRichard Henderson1-98/+103
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Fix subtract immediate rangeRichard Henderson1-5/+11
Since we must use ADDUI, we would generate incorrect code for -32768. Leaving off subtract of +32768 makes things easier for a follow-on patch. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Name the opcode enumerationRichard Henderson1-9/+9
And use it in the opcode emission functions. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Use EXT for AND on mips32r2Richard Henderson2-14/+50
At the same time, tidy deposit by introducing tcg_out_opc_bf. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Use T9 for TCG_TMP1Richard Henderson1-1/+1
T0 is an argument register for the n32 and n64 abis. T9 is the call address register for the abis, and is more directly under the control of the backend. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Introduce TCG_TMP0, TCG_TMP1Richard Henderson1-114/+117
Use these instead of hard-coding the registers to use for temporaries. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Rearrange register allocationRichard Henderson2-11/+19
Use FP (also known as S8) as a normal call-saved register. Include T0 in the allocation order and call-clobbered list even though it's currently used as a TCG temporary. Put the argument registers at the end of the allocation order. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Convert to new_ldstRichard Henderson2-53/+25
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Convert to new qemu_l/st helpersRichard Henderson1-51/+56
In addition, fill delay slots calling the helpers and tail call to the store helpers. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Move softmmu slow path out of lineRichard Henderson1-389/+383
At the same time, tidy up the call helpers, avoiding a memory reference. Split out several subroutines. Use TCGMemOp constants. Make endianness selectable at runtime. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
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