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2010-06-02sparc64: fix umul and smul insnsIgor V. Kovalenko1-26/+29
- truncate and sign or zero extend operands before multiplication - factor out common code to gen_op_multiply() with parameter to sign/zero extend - call gen_op_multiply from gen_op_umul and gen_op_smul Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02sparc64: fix udiv and sdiv insnsIgor V. Kovalenko1-2/+2
- truncate second operand to 32bit Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02sparc64: improve ldf and stf insnsIgor V. Kovalenko1-0/+28
- implemented block load/store primary/secondary with user privilege Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02sparc64: use symbolic name for MMU index v1Igor V. Kovalenko1-12/+16
- use symbolic name for MMU index v0->v1: - change debug traces to DPRINTF_MMU - fix debug trace function names Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02sparc64: fix ldxfsr insnIgor V. Kovalenko1-1/+5
- rearrange code to break from switch when appropriate - allow deprecated ldfsr insn Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02sparc64: fix missing address masking v1Igor V. Kovalenko2-2/+52
- address masking for ldqf and stqf insns - address masking for lddf and stdf insns - address masking for translating ASI (Ultrasparc IIi) v0->v1: - move arch-specific code to helpers and drop more ifdefs at call sites using new helper asi_address_mask() - change user emulation to use asi_address_mask() Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02sparc64: fix tag access register on mmu trapsIgor V. Kovalenko1-0/+5
- set mmu tag access register on FAULT and PROT traps as well Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix)Artyom Tarasenko1-0/+1
SuperSPARC MMU Breakpoint Action register is used by OBP at boot The patch allows booting Solaris and some other OS with SPARCStation-20 OBP. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29sparc64: fix user emulator buildBlue Swirl1-0/+2
Accesses with _nucleus prefix are not available when building user emulators: CC sparc64-linux-user/op_helper.o cc1: warnings being treated as errors /src/qemu/target-sparc/op_helper.c: In function 'helper_ldda_asi': /src/qemu/target-sparc/op_helper.c:3063: error: implicit declaration of function 'ldq_nucleus' Avoid making such accesses. Fixes breakage by 54a3c0f032abf93d1cedc75456af75401ac10360. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29sparc64: fix 128-bit atomic load from nucleus context v1Igor V. Kovalenko1-5/+5
- change 128-bit atomic loads to reference nucleus context v0->v1: dropped disassembler change Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: flush translations on mmu context changeIgor V. Kovalenko1-0/+6
- two pairs of softmmu indexes bind softmmu tlb to cpu tlb in fault handlers using value of DMMU primary and secondary context registers, so we need to flush softmmu translations when context registers are changed Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: fix mmu context at trap levels above zeroIgor V. Kovalenko3-8/+35
- cpu_mmu_index return MMU_NUCLEUS_IDX if trap level is not zero - cpu_get_tb_cpu_state: store trap level and primary context in flags this allows to restart code translation when address translation is changed - stop translation block after writing to pstate and tl registers - stop translation block after writing to alternate space this can be optimized to stop only if address translation can be changed by write operation (e.g. by comparing with MMU ASI values) Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: fix dump_mmu to look for global bit in tte value instead of tagIgor V. Kovalenko1-2/+2
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: fix pstate privilege bitsIgor V. Kovalenko4-36/+57
- refactor code to handle hpstate only if available for current cpu - conditionally set hypervisor bit in hpstate register - reorder softmmu indices so user accessable ones go first, translation context macros supervisor() and hypervisor() adjusted as well - disable sparcv8 registers for TARGET_SPARC64 - fix cpu_mmu_index to use sparcv9 bits only Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: generate data access exception on RW violationIgor V. Kovalenko1-37/+62
- separate PRIV and PROT handling - DPRINTF_MMU macro to clean up debug code - dump mmu_idx, trap level and mmu context registers along with address translation values Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22Fix %lld or %llx printf format useBlue Swirl1-2/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-20target-sparc: Inline some generation of carry for ADDX/SUBX.Richard Henderson3-76/+200
Computing carry is trivial for some inputs. By avoiding an external function call, we generate near-optimal code for the common cases of add+addx (double-word arithmetic) and cmp+addx (a setcc pattern). Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-19target-sparc: Simplify ICC generation.Richard Henderson1-80/+140
Use int32 types instead of target_ulong when computing ICC. This simplifies the generated code for 32-bit host and 64-bit guest. Use the same simplified expressions for ICC as were already used for XCC in carry flag generation. Simplify the ADD carry generation to not consider a possible carry-in. Use the more complex carry computation for ADDX only. Use the same carry algorithm for the XCC result of ADDX. Similarly for SUB/SUBX. Use the ADD carry generation functions for TADD/TADDTV. Similarly for SUB and TSUB/TSUBTV. Tidy the code with respect to CODING_STYLE. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-19target-sparc: Fix compilation with --enable-debug.Richard Henderson2-2/+2
Return a target_ulong from compute_C_icc to match the width of the users. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-16sparc: move DT and QT defines to op_helper.cBlue Swirl2-5/+5
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-16sparc64: fix TT_WOTHER valueIgor V. Kovalenko1-1/+1
- fix off by one error in spill trap number bit for other window (must be bit 5) - fixes invalid instruction issue with HelenOS Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-16sparc64: fix mmu demap operand typoIgor V. Kovalenko1-2/+2
- must use store address operand to demap, not store value Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-12target-sparc: Fix wrong printf argumentStefan Weil1-1/+1
cpu_get_ccr() returns a target_ulong, so a type cast is needed to avoid wrong output on big endian hosts. We could also use TARGET_FMT_lx, but that would print 8 instead of 2 digits. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-09sparc: Fix lazy flag calculation on interrupts, refactorBlue Swirl4-129/+259
Recalculate Sparc64 CPU flags on interrupts, otherwise some earlier flags could be stored to pstate. Refactor PSR/CCR/CWP handling: concentrate the actual functions to op_helper.c. Thanks to Igor Kovalenko for reporting. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-09sparc: lazy C flag calculationBlue Swirl1-16/+8
Calculate only the carry flag for ADDX/SUBX instead of full set of flags. Thanks to Igor Kovalenko for spotting a bug with an earlier version. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-07sparc64: fix build with older gccsBlue Swirl1-0/+1
Fix errors missed in 2065061ede22d401aae2ce995c3af54db9d28639: CC sparc64-softmmu/helper.o cc1: warnings being treated as errors /src/qemu/target-sparc/helper.c: In function 'get_physical_address': /src/qemu/target-sparc/helper.c:426: warning: 'context' may be used uninitialized in this function /src/qemu/target-sparc/helper.c:426: note: 'context' was declared here Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-06sparc64: handle asi referencing nucleus and secondary MMU contextsIgor V. Kovalenko4-75/+219
- increase max supported MMU modes to 6 - handle nucleus context asi - handle secondary context asi - handle non-faulting loads from secondary context Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-06sparc64: implement global translation table entries v1Igor V. Kovalenko3-28/+76
- match global tte against any context - show global tte in MMU dump v0->v1: added default case to switch statement in demap_tlb - should fix gcc warning about uninitialized context variable Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-26target-sparc: Fix -singlestep.Richard Henderson1-4/+5
Single-stepping was not properly updating npc, resulting in some instructions being executed twice. In addition, we were emitting dead code at the end of the TB. Fix both by teaching gen_goto_tb to avoid goto_tb for single-step and removing the special-case code in gen_intermediate_code_internal. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-23target-sparc: Fix address masking in ldqf and stqf.Richard Henderson1-14/+11
Use address_mask on both addr and addr+8 in both these routines, rather than explicit masking with 0xffffffff. Reformulate address_mask to return a result, rather than masking a pass-by-reference argument. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-18Fix harmless if statements with empty body, spotted by clangBlue Swirl1-1/+2
These clang errors are harmless but worth fixing: CC ppc-softmmu/usb-ohci.o /src/qemu/hw/usb-ohci.c:1104:59: error: if statement has empty body [-Wempty-body] ohci->ctrl_head, ohci->ctrl_cur); /src/qemu/hw/usb-ohci.c:1371:57: error: if statement has empty body [-Wempty-body] DPRINTF("usb-ohci: port %d: SUSPEND\n", portnum); CC sparc64-softmmu/translate.o /src/qemu/target-sparc/translate.c:3173:37: error: if statement has empty body [-Wempty-body] ; // XXX Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-17target-sparc: Free instruction temporaries.Richard Henderson1-25/+27
Rather than creating new temporaries for constants, use the ones created in disas_sparc_insn. Remember the temps created there so that they can be freed at the end of the function. Profile data collected by TCG while booting sparc-test kernel: -avg temps/TB 70.61 max=421 +avg temps/TB 62.75 max=66 Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-17target-sparc: Fix TARGET_{PHYS,VIRT}_ADDR_SPACE_BITS.Richard Henderson1-6/+6
The 32 and 64-bit definitions were swapped in the ifdef. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-17Sparc: fix PC/NPC during FPU trapsBlue Swirl1-0/+2
All FPU instructions can trap, so save PC/NPC state before executing them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-11Sparc: fix exceptions in delay slotBlue Swirl1-4/+4
Fix a case where an exception happens with the instruction in the delay slot. Recovery of branch condition in the exception handling code was not converted to TCG. Because the condition was bogus, wrong NPC could be selected from the two candidates. A nice bug report with a test case can be found in: https://bugs.launchpad.net/qemu/+bug/551814 Fix based on patch by Fabrice Bellard. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini1-0/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-17Large page TLB flushPaul Brook1-14/+26
QEMU uses a fixed page size for the CPU TLB. If the guest uses large pages then we effectively split these into multiple smaller pages, and populate the corresponding TLB entries on demand. When the guest invalidates the TLB by virtual address we must invalidate all entries covered by the large page. However the address used to invalidate the entry may not be present in the QEMU TLB, so we do not know which regions to clear. Implementing a full vaiable size TLB is hard and slow, so just keep a simple address/mask pair to record which addresses may have been mapped by large pages. If the guest invalidates this region then flush the whole TLB. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Target specific usermode cleanupPaul Brook2-1/+16
Disable various target specific code that is only relevant to system emulation. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook1-7/+1
cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson1-0/+8
Removes a set of ifdefs from exec.c. Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other than Alpha. This will be used for page_find_alloc, which is supposed to be using virtual addresses in the first place. Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-02-25target-sparc: fix --enable-debug build for 64 bit hostStefan Weil1-1/+1
b551ec04ca45d1925417dd2ec7c1b7f115c84f1d fixed the compilation for 32 bit hosts, but introduced a new error for 64 bit hosts: tcg_temp_new_ptr needs a matching tcg_temp_free_ptr. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-20target-sparc: fix --enable-debug buildJay Foad1-11/+11
Use 32-bit arithmetic for the address offset calculation to fix a build failure on 32-bit hosts. Signed-off-by: Jay Foad <jay.foad@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-31sparc32 don't mark page dirty when failingArtyom Tarasenko1-5/+6
if the access check fails, the page can not be modified and shouldn't be marked dirty. The patch fixes the "hsfs_putpage: dirty HSFS page" error in Solaris guests. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-27sparc64: reimplement tick timers v4Igor V. Kovalenko2-13/+29
sparc64 timer has tick counter which can be set and read, and tick compare value used as deadline to fire timer interrupt. The timer is not used as periodic timer, instead deadline is set each time new timer interrupt is needed. v3 -> v4: - coding style v2 -> v3: - added missing timer debug output macro - CPUTimer struct and typedef moved to cpu.h - change CPU_SAVE_VERSION to 6, older save formats not supported v1 -> v2: - new conversion helpers cpu_to_timer_ticks and timer_to_cpu_ticks - save offset from clock source to implement cpu_tick_set_count - renamed struct sun4u_timer to CPUTimer - load and save cpu timers v0 -> v1: - coding style Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-27sparc64: correct write extra bits to cwpIgor V. Kovalenko1-1/+1
- correctly fit to cwp if provided window number is out of range Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-23sparc32 fix np dereference in do_unassigned_accessArtyom Tarasenko1-1/+2
fix a potential null pointer dereference introduced in commit 576c2cdc767ab9e2dc038fa4c99f22e53287a3de Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-19kill regs_to_env and env_to_regsPaolo Bonzini1-8/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-01-17Sparc: improve CPU register dumpBlue Swirl1-30/+55
Common: * Remove unnecessary 0x prefix * Print %y * Fix NZVC flag print order to match CPU bit order Sparc64 specific: * Print registers without line wrapping * Print %f40-%f63 * Pretty print CCR flags * Print %fsr and %fprs in full precision * More consistent formatting Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-15sparc32 do_unassigned_access overhaul v2Artyom Tarasenko1-12/+30
According to pages 9-31 - 9-34 of "SuperSPARC & MultiCache Controller User's Manual": 1. "A lower priority fault may not overwrite the MFSR status of a higher priority fault." 2. The MFAR is overwritten according to the policy defined for the MFSR 3. The overwrite bit is asserted if the fault status register (MFSR) has been written more than once by faults of the same class 4. SuperSPARC will never place instruction fault addresses in the MFAR. Implementation of points 1-3 allows booting Solaris 2.6 and 2.5.1. v2: CODING_STYLE fixes Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-13Sparc32: remove unused variable, spotted by clangBlue Swirl1-5/+0
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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