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2014-08-22linux-user: Handle NULL sched_param argument to sched_*Tom Musta1-0/+10
The sched_getparam, sched_setparam and sched_setscheduler system calls take a pointer argument to a sched_param structure. When this pointer is null, errno should be set to EINVAL. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: Detect Negative Message Sizes in msgsnd System CallTom Musta1-1/+5
The msgsnd system call takes an argument that describes the message size (msgsz) and is of type size_t. The system call should set errno to EINVAL in the event that a negative message size is passed. Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: Conditionally Pass Attribute Pointer to mq_open()Tom Musta1-3/+7
The mq_open system call takes an optional struct mq_attr pointer argument in the fourth position. This pointer is used when O_CREAT is specified in the flags (second) argument. It may be NULL, in which case the queue is created with implementation defined attributes. Change the code to properly handle the case when NULL is passed in the arg4 position. Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: Make ipc syscall's third argument an abi_longTom Musta1-4/+4
For those target ABIs that use the ipc system call (e.g. POWER), the third argument is used in the shmat path as a pointer. It therefore must be declared as an abi_long (versus int) so that the address bits are not lost in truncation. In fact, all arguments to do_ipc should be declared as abit_long. In fact, it makes more sense for all of the arguments to be declaried as abi_long (except call). Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: Properly Handle semun Structure In Cross-Endian SituationsTom Musta1-2/+11
The semun union used in the semctl system call contains both an int (val) and pointers. In cross-endian situations on 64 bit targets, the value passed to semctl is an 8 byte (abi_long) value and thus does not have the 4-byte val field in the correct location. In order to rectify this, the other half of the union must be accessed. This is achieved in code by performing a byte swap on the entire 8 byte union, followed by a 4-byte swap of the first half. Also, eliminate an extraneous (dead) line of code that sets target_su.val in the IPC_SET/IPC_GET case. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: Dereference Pointer Argument to ipc/semctl Sys CallTom Musta1-2/+8
When the ipc system call is used to wrap a semctl system call, the ptr argument to ipc needs to be dereferenced prior to passing it to the semctl handler. This is because the fourth argument to semctl is a union and not a pointer to a union. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: PPC64 semid_ds Doesnt Include _unused1 and _unused2Tom Musta1-0/+4
The 64 bit PowerPC platforms eliminate the _unused1 and _unused2 elements of the semid_ds structure from <sys/sem.h>. So eliminate these from the target_semid_ds structure. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: add setns and unshareRiku Voipio3-0/+34
Add support for the setns and unshare syscalls, trivially passed through to the host. Based on patches by Paul Burton, added configure check. Signed-off-by: Paul Burton <paul@archlinuxmips.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: support ioprio_{get, set} syscallsPaul Burton1-0/+18
Add support for the ioprio_get & ioprio_set syscalls, allowing their use by target programs. Signed-off-by: Paul Burton <paul@archlinuxmips.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: support timerfd_{create, gettime, settime} syscallsRiku Voipio3-0/+71
Adds support for the timerfd_create, timerfd_gettime & timerfd_settime syscalls, allowing use of timerfds by target programs. v2: By Riku - added configure check for timerfd and ifdefs for benefit of old distributions like RHEL5. Signed-off-by: Paul Burton <paul@archlinuxmips.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: fix readlink handling with magic exe symlinkMike Frysinger1-2/+13
The current code always returns the length of the path when it should be returning the number of bytes it wrote to the output string. Further, readlink is not supposed to append a NUL byte, but the current snprintf logic will always do just that. Even further, if you pass in a length of 0, you're suppoesd to get back an error (EINVAL), but the current logic just returns 0. Further still, if there was an error reading the symlink, we should not go ahead and try to read the target buffer as it is garbage. Simple test for the first two issues: $ cat test.c int main() { char buf[50]; size_t len; for (len = 0; len < 10; ++len) { memset(buf, '!', sizeof(buf)); ssize_t ret = readlink("/proc/self/exe", buf, len); buf[20] = '\0'; printf("readlink(/proc/self/exe, {%s}, %zu) = %zi\n", buf, len, ret); } return 0; } Now compare the output of the native: $ gcc test.c -o /tmp/x $ /tmp/x $ strace /tmp/x With what qemu does: $ armv7a-cros-linux-gnueabi-gcc test.c -o /tmp/x -static $ qemu-arm /tmp/x $ qemu-arm -strace /tmp/x Signed-off-by: Mike Frysinger <vapier@chromium.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: Fix conversion of sigevent argument to timer_createPeter Maydell1-8/+30
There were a number of bugs in the conversion of the sigevent argument to timer_create from target to host format: * signal number not converted from target to host * thread ID not copied across * sigev_value not copied across * we never unlocked the struct when we were done Between them, these problems meant that SIGEV_THREAD_ID timers (and the glibc-implemented SIGEV_THREAD timers which depend on them) didn't work. Fix these problems and clean up the code a little by pulling the struct conversion out into its own function, in line with how we convert various other structs. This allows the test program in bug LP:1042388 to run. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: Fix syscall instruction usermode emulation on X86_64Jincheng Miao2-3/+2
Currently syscall instruction is buggy on user mode X86_64, the EIP is updated after do_syscall(), that is too late for clone(). Because clone() will create a thread at the env->EIP (the address of syscall insn), and then child thread enters do_syscall() again, that is not expected. Sometimes it is tragic. User mode syscall insn emulation is not used MSR, so the action should be same to INT 0x80. INT 0x80 will update EIP in do_interrupt(), ditto for syscall() for consistency. Signed-off-by: Jincheng Miao <jmiao@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: redirect openat callsRiku Voipio1-14/+9
While Mikhail fixed /proc/self/maps, it was noticed openat calls are not redirected currently. Some archs don't have open at all, so openat needs to be redirected. Fix this by consolidating open/openat code to do_openat - open is implemented using openat(AT_FDCWD, ... ), which according to open(2) man page is identical. Since all targets now have openat, remove the ifdef around sys_openat and openat: case in do_syscall. Cc: Mikhail Ilin <m.ilin@samsung.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-22linux-user: /proc/self/maps contentMikhail Ilyin2-15/+12
Build /proc/self/maps doing a match against guest memory translation table. Output only that map records which are valid for guest memory layout. Signed-off-by: Mikhail Ilyin <m.ilin@samsung.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2014-08-21Merge remote-tracking branch 'remotes/otubo/seccomp' into stagingPeter Maydell1-1/+2
* remotes/otubo/seccomp: seccomp: add semctl() to the syscall whitelist Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-21seccomp: add semctl() to the syscall whitelistPaul Moore1-1/+2
QEMU needs to call semctl() for correct operation. This particular problem was identified on shutdown with the following commandline: # qemu -sandbox on -monitor stdio \ -device intel-hda -device hda-duplex -vnc :0 Signed-off-by: Paul Moore <pmoore@redhat.com> Signed-off-by: Eduardo Otubo <eduardo.otubo@profitbricks.com>
2014-08-20Merge remote-tracking branch ↵Peter Maydell19-88/+563
'remotes/pmaydell/tags/pull-target-arm-20140819' into staging target-arm: * fix preferred return address for A64 BRK insn * implement AArch64 single-stepping * support loading gzip compressed AArch64 kernels * use correct PSCI function IDs in the DT when KVM uses PSCI 0.2 * minor cleanups # gpg: Signature made Tue 19 Aug 2014 19:04:09 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140819: arm: stellaris: Remove misleading address_space_mem var arm: armv7m: Rename address_space_mem -> system_memory aarch64: Allow -kernel option to take a gzip-compressed kernel. loader: Add load_image_gzipped function. arm: cortex-a9: Fix cache-line size and associativity arm/virt: Use PSCI v0.2 function IDs in the DT when KVM uses PSCI v0.2 target-arm: Rename QEMU PSCI v0.1 definitions target-arm: Implement MDSCR_EL1 as having state target-arm: Implement ARMv8 single-stepping for AArch32 code target-arm: Implement ARMv8 single-step handling for A64 code target-arm: A64: Avoid duplicate exit_tb(0) in non-linked goto_tb target-arm: Set PSTATE.SS correctly on exception return from AArch64 target-arm: Correctly handle PSTATE.SS when taking exception to AArch32 target-arm: Don't allow AArch32 to access RES0 CPSR bits target-arm: Adjust debug ID registers per-CPU target-arm: Provide both 32 and 64 bit versions of debug registers target-arm: Allow STATE_BOTH reginfo descriptions for more than cp14 target-arm: Collect up the debug cp register definitions target-arm: Fix return address for A64 BRK instructions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19Revert "memory: Use canonical path component as the name"Peter Maydell2-1/+4
This reverts commit b0225c2c0d89200a29dc3d0b59d2e87a79cbaeb8 (which breaks building with Xen enabled and also leaks memory). Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19arm: stellaris: Remove misleading address_space_mem varPeter Crosthwaite1-2/+1
It's a MemoryRegion and not an AddressSpace. But since it's single use, just inline the get_system_memory() call to the only usage to remove it. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: d6914047e10b956514cfaa5f391ef56c7d851b34.1408347860.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19arm: armv7m: Rename address_space_mem -> system_memoryPeter Crosthwaite2-5/+5
This argument is a MemoryRegion and not an AddressSpace. "Address space" means something quite different to "memory region" in QEMU parlance so rename the variable to reduce confusion. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: f666cf7f2318d9b461b1e320a45bf0d82da9b7dd.1408347860.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19aarch64: Allow -kernel option to take a gzip-compressed kernel.Richard W.M. Jones1-0/+7
On aarch64 it is the bootloader's job to uncompress the kernel. UEFI and u-boot bootloaders do this automatically when the kernel is gzip-compressed. However the qemu -kernel option does not do this. The following command does not work: qemu-system-aarch64 [...] -kernel /boot/vmlinuz because it tries to execute the gzip-compressed data. This commit lets gzip-compressed kernels be uncompressed transparently. Currently this is only done when emulating aarch64. Signed-off-by: Richard W.M. Jones <rjones@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1407831259-2115-3-git-send-email-rjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19loader: Add load_image_gzipped function.Richard W.M. Jones2-0/+49
As the name suggests this lets you load a ROM/disk image that is gzipped. It is uncompressed before storing it in guest memory. Signed-off-by: Richard W.M. Jones <rjones@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1407831259-2115-2-git-send-email-rjones@redhat.com [PMM: removed stray space before ')'] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19arm: cortex-a9: Fix cache-line size and associativityPeter Crosthwaite1-2/+2
For A9, The cache associativity is 4 and the lines size is 32B. Self identify in CCSIDR accordingly. Cache size remains at 16k. QEMU doesn't emulate caches, but we should still report the correct cache-line size to the guest. Some guests (like u-boot) complain if the cache-line size mismatches a requested flush or invalidate operation. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1de6bd40155a1d2f2e93e24b1b1d1d677a432641.1408346233.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19arm/virt: Use PSCI v0.2 function IDs in the DT when KVM uses PSCI v0.2Christoffer Dall2-5/+53
The current code supplies the PSCI v0.1 function IDs in the DT even when KVM uses PSCI v0.2. This will break guest kernels that only support PSCI v0.1 as they will use the IDs provided in the DT. Guest kernels with PSCI v0.2 support are not affected by this patch, because they ignore the function IDs in the device tree and rely on the architecture definition. Define QEMU versions of the constants and check that they correspond to the Linux defines on Linux build hosts. After this patch, both guest kernels with PSCI v0.1 support and guest kernels with PSCI v0.2 should work. Tested on TC2 for 32-bit and APM Mustang for 64-bit (aarch64 guest only). Both cases tested with 3.14 and linus/master and verified I could bring up 2 cpus with both guest kernels. Also tested 32-bit with a 3.14 host kernel with only PSCI v0.1 and both guests booted here as well. Cc: qemu-stable@nongnu.org Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19target-arm: Rename QEMU PSCI v0.1 definitionsChristoffer Dall2-15/+15
The function IDs for PSCI v0.1 are exported by KVM and defined as KVM_PSCI_FN_<something>. To build using these defines in non-KVM code, QEMU defines these IDs locally and check their correctness against the KVM headers when those are available. However, the naming scheme used for QEMU (almost) clashes with the PSCI v0.2 definitions from Linux so to avoid unfortunate naming when we introduce local PSCI v0.2 defines, rename the current local defines with QEMU_ prependend and clearly identify the PSCI version as v0.1 in the defines. Cc: qemu-stable@nongnu.org Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19target-arm: Implement MDSCR_EL1 as having statePeter Maydell1-1/+3
Now that all the new code to support single-stepping is in place, wire up the guest-visible MDSCR_EL1, so the guest can enable single-stepping. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-08-19target-arm: Implement ARMv8 single-stepping for AArch32 codePeter Maydell2-2/+95
ARMv8 single-stepping requires the exception level that controls the single-stepping to be in AArch64 execution state, but the code being stepped may be in AArch64 or AArch32. Implement the necessary support code for single-stepping AArch32 code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-08-19target-arm: Implement ARMv8 single-step handling for A64 codePeter Maydell6-5/+131
Implement ARMv8 software single-step handling for A64 code: correctly update the single-step state machine and generate debug exceptions when stepping A64 code. This patch has no behavioural change since MDSCR_EL1.SS can't be set by the guest yet. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-08-19target-arm: A64: Avoid duplicate exit_tb(0) in non-linked goto_tbPeter Maydell1-2/+3
If gen_goto_tb() decides not to link the two TBs, then the fallback path generates unnecessary code: * if singlestep is enabled then we generate unreachable code after the gen_exception_internal(EXCP_DEBUG) * if singlestep is disabled then we will generate exit_tb(0) twice, once in gen_goto_tb() and once coming out of the main loop with is_jmp set to DISAS_JUMP Correct these deficiencies by only emitting exit_tb() in the non-singlestep case, in which case we can use DISAS_TB_JUMP to suppress the main-loop exit_tb(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-08-19target-arm: Set PSTATE.SS correctly on exception return from AArch64Peter Maydell2-0/+81
Set the PSTATE.SS bit correctly on exception returns from AArch64, as required by the debug single-step functionality. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-08-19target-arm: Correctly handle PSTATE.SS when taking exception to AArch32Peter Maydell1-0/+4
When an exception is taken to AArch32, we must clear the PSTATE.SS bit for the exception handler, and must also ensure that the SS bit is not set in the value saved to SPSR_<mode>. Achieve both of these aims by clearing the bit in uncached_cpsr before saving it to the SPSR. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-08-19target-arm: Don't allow AArch32 to access RES0 CPSR bitsPeter Maydell3-9/+18
The CPSR has a new-in-v8 execution state bit (IL), and also some state which has effects in AArch32 but appears only in the SPSR format (SS) but is RES0 in the CPSR. Add the IL bit to CPSR_EXEC, and enforce that guest direct reads and writes to CPSR can't read or write the RES0 bits, so the guest can't get at the SS bit which we store in uncached_cpsr. This includes not permitting exception returns to copy reserved bits from an SPSR into CPSR. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-08-19target-arm: Adjust debug ID registers per-CPUPeter Maydell4-7/+31
Allow each CPU type to specify the value for the debug ID registers, by putting them in the ARMCPU struct, and use the resulting information to only expose the correct number of watchpoint and breakpoint registers for the CPU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-08-19target-arm: Provide both 32 and 64 bit versions of debug registersPeter Maydell1-14/+20
Bring the 32 bit and 64 bit views of the debug registers into line by providing the same set of registers in both cases. (This still isn't a complete set, but it is consistent.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-08-19target-arm: Allow STATE_BOTH reginfo descriptions for more than cp14Peter Maydell1-3/+8
Currently the STATE_BOTH shorthand for allowing a single reginfo struct to define handling for both AArch32 and AArch64 views of a register only permits this where the AArch32 view is in cp15. It turns out that the debug registers in cp14 also have neatly lined up encodings; allow these also to share reginfo structs by permitting a STATE_BOTH reginfo to specify the .cp field (and continue to default to 15 if it is not specified). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-08-19target-arm: Collect up the debug cp register definitionsPeter Maydell1-32/+53
At the moment we have a mixed set of mostly dummy register definitions for various debug related registers which have been added piecemeal in order to get Linux kernels to boot. In preparation for actually implementing debug support, bring them all together into one place. This commit doesn't change behaviour: we still expose exactly the same registers and behaviour to the guest in all configurations. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-08-19target-arm: Fix return address for A64 BRK instructionsPeter Maydell1-1/+1
When we take an exception resulting from a BRK instruction, the architecture requires that the "preferred return address" reported to the exception handler is the address of the BRK itself, not the following instruction (like undefined insns, and in contrast with SVC, HVC and SMC). Follow this, rather than incorrectly reporting the address of the following insn. (We do get this correct for the A32/T32 BKPT insns.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-stable@nongnu.org
2014-08-19Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell62-308/+183
SCSI changes that enable sending vendor-specific commands via virtio-scsi. Memory changes for QOMification and automatic tracking of MR lifetime. # gpg: Signature made Mon 18 Aug 2014 13:03:09 BST using RSA key ID 9B4D86F2 # gpg: Good signature from "Paolo Bonzini <pbonzini@redhat.com>" # gpg: aka "Paolo Bonzini <bonzini@gnu.org>" * remotes/bonzini/tags/for-upstream: mtree: remove write-only field memory: Use canonical path component as the name memory: Use memory_region_name for name access memory: constify memory_region_name exec: Abstract away ref to memory region names loader: Abstract away ref to memory region names tpm_tis: remove instance_finalize callback memory: remove memory_region_destroy memory: convert memory_region_destroy to object_unparent ioport: split deletion and destruction nic: do not destroy memory regions in cleanup functions vga: do not dynamically allocate chain4_alias sysbus: remove unused function sysbus_del_io qom: object: move unparenting to the child property's release callback qom: object: delete properties before calling instance_finalize virtio-scsi: implement parse_cdb scsi-block, scsi-generic: implement parse_cdb scsi-block: extract scsi_block_is_passthrough scsi-bus: introduce parse_cdb in SCSIDeviceClass and SCSIBusInfo scsi-bus: prepare scsi_req_new for introduction of parse_cdb Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19Merge remote-tracking branch 'remotes/qmp-unstable/queue/qmp' into stagingPeter Maydell4-25/+17
* remotes/qmp-unstable/queue/qmp: monitor: fix use after free dump.c: Fix memory leak issue in cleanup processing for dump_init() monitor: Remove hardcoded watchdog event names Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-18monitor: fix use after freeMichael S. Tsirkin3-6/+7
The function monitor_fdset_dup_fd_find_remove() references member of 'mon_fdset' which - when remove flag is set - may be freed in function monitor_fdset_cleanup(). remove is set by monitor_fdset_dup_fd_remove which in practice does not need the returned value, so make it void, and return -1 from monitor_fdset_dup_fd_find_remove. Reported-by: zhanghailiang <zhang.zhanghailiang@huawei.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2014-08-18dump.c: Fix memory leak issue in cleanup processing for dump_init()Chen Gang1-13/+5
In dump_init(), when failure occurs, need notice about 'fd' and memory mapping. So call dump_cleanup() for it (need let all initializations at front). Also simplify dump_cleanup(): remove redundant 'ret' and redundant 'fd' checking. Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2014-08-18monitor: Remove hardcoded watchdog event namesHani Benhabiles1-6/+5
Signed-off-by: Hani Benhabiles <hani@linux.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2014-08-18Merge remote-tracking branch 'remotes/amit/for-2.2' into stagingPeter Maydell2-0/+34
* remotes/amit/for-2.2: virtio-serial: search for duplicate port names before adding new ports virtio-serial: create a linked list of all active devices Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-18virtio-serial: search for duplicate port names before adding new portsAmit Shah1-0/+22
Before adding new ports to VirtIOSerial devices, check if there's a conflict in the 'name' parameter. This ensures two virtserialports with identical names are not initialized. Reported-by: <mazhang@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com>
2014-08-18virtio-serial: create a linked list of all active devicesAmit Shah2-0/+12
To ensure two virtserialports don't get added to the system with the same 'name' parameter, we need to access all the ports on all the devices added, and compare the names. We currently don't have a list of all VirtIOSerial devices added to the system. This commit adds a simple linked list in which devices are put when they're initialized, and removed when they go away. Signed-off-by: Amit Shah <amit.shah@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com>
2014-08-18Merge remote-tracking branch 'remotes/mcayland/qemu-sparc' into stagingPeter Maydell3-5/+26
* remotes/mcayland/qemu-sparc: target-sparc64: implement Short Floating-Point Store Instructions apb: add IOMMU flush register implementation sun4u: switch second PCI-ebus bridge BAR over to PCI IO space Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-18Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell33-238/+1991
staging Block pull request # gpg: Signature made Fri 15 Aug 2014 18:04:23 BST using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" * remotes/stefanha/tags/block-pull-request: (55 commits) qcow2: fix new_blocks double-free in alloc_refcount_block() image-fuzzer: Reduce number of generator functions in __init__ image-fuzzer: Add generators of L1/L2 tables image-fuzzer: Add fuzzing functions for L1/L2 table entries docs: Expand the list of supported image elements with L1/L2 tables image-fuzzer: Public API for image-fuzzer/runner/runner.py image-fuzzer: Generator of fuzzed qcow2 images image-fuzzer: Fuzzing functions for qcow2 images image-fuzzer: Tool for fuzz tests execution docs: Specification for the image fuzzer ide: only constrain read/write requests to drive size, not other types virtio-blk: Correct bug in support for flexible descriptor layout libqos: Change free function called in malloc libqos: Correct mask to align size to PAGE_SIZE in malloc-pc libqtest: add QTEST_LOG for debugging qtest testcases ide: Fix segfault when flushing a device that doesn't exist qemu-options: add missing -drive discard option to cmdline help parallels: 2TB+ parallels images support parallels: split check for parallels format in parallels_open parallels: replace tabs with spaces in block/parallels.c ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-18mtree: remove write-only fieldPaolo Bonzini1-7/+3
ml->printed is never set to true. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-08-18memory: Use canonical path component as the namePeter Crosthwaite2-4/+1
Rather than having the name as separate state. This prepares support for creating a MemoryRegion dynamically (i.e. without memory_region_init() and friends) and the MemoryRegion still getting a usable name. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>