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authorPetar Jovanovic <petar.jovanovic@imgtec.com>2014-01-24 13:45:05 +0100
committerPetar Jovanovic <petar.jovanovic@imgtec.com>2014-02-10 16:46:12 +0100
commitb4160af160ba045e3a25013b4def4a39f09cbb78 (patch)
tree81c53bf0b988e8b4f7972d908337ec7f5ba51249 /target-mips/cpu.h
parente527526d355570615533d38236818c759f29d889 (diff)
target-mips: add support for CP0_Config4
Add CP0_Config4, define rw_bitmask. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Reviewed-by: Eric Johnson <eric.johnson@imgtec.com>
Diffstat (limited to 'target-mips/cpu.h')
-rw-r--r--target-mips/cpu.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 9caf4474b9..e8216abe09 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -368,6 +368,9 @@ struct CPUMIPSState {
#define CP0C3_MT 2
#define CP0C3_SM 1
#define CP0C3_TL 0
+ uint32_t CP0_Config4;
+ uint32_t CP0_Config4_rw_bitmask;
+#define CP0C4_M 31
int32_t CP0_Config6;
int32_t CP0_Config7;
/* XXX: Maybe make LLAddr per-TC? */