Implement sun4u PCI IRQ routing.

Allow multiple PCI busses and PCI-PCI bridges.
Fix bugs in Versatile PCI implementation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2166 c046a42c-6fe2-441c-8c8c-71466251a162

1 files changed, 3 insertions, 9 deletions

diff --git a/hw/prep_pci.c b/hw/prep_pci.c
index b5ff8eb0ff..3d93c065ff 100644
--- a/hw/prep_pci.c
+++ b/hw/prep_pci.c
@@ -120,18 +120,12 @@ static CPUReadMemoryFunc *PPC_PCIIO_read[] = {
 /* Don't know if this matches real hardware, but it agrees with OHW.  */
 static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
 {
-    return (irq_num + (pci_dev->devfn >> 3)) & 3;
+    return (irq_num + (pci_dev->devfn >> 3)) & 1;
 }
 
-static int prep_irq_levels[4];
-
 static void prep_set_irq(void *pic, int irq_num, int level)
 {
-    int pic_irq_num;
-    prep_irq_levels[irq_num] = level;
-    level |= prep_irq_levels[irq_num ^ 2];
-    pic_irq_num = (irq_num == 0 || irq_num == 2) ? 9 : 11;
-    pic_set_irq(pic_irq_num, level);
+    pic_set_irq(irq_num ? 11 : 9, level);
 }
 
 PCIBus *pci_prep_init(void)
@@ -141,7 +135,7 @@ PCIBus *pci_prep_init(void)
     int PPC_io_memory;
 
     s = qemu_mallocz(sizeof(PREPPCIState));
-    s->bus = pci_register_bus(prep_set_irq, prep_map_irq, NULL, 0);
+    s->bus = pci_register_bus(prep_set_irq, prep_map_irq, NULL, 0, 2);
 
     register_ioport_write(0xcf8, 4, 4, pci_prep_addr_writel, s);
     register_ioport_read(0xcf8, 4, 4, pci_prep_addr_readl, s);