From c81cc767e4eef7a03dfeda2ed01565f3906b6f24 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 4 Jan 2018 11:21:33 -0800 Subject: broadcom/vc5: Drop signal bit #defines. Signals are more complicated than that, and tables ended up being better. --- src/broadcom/qpu/qpu_instr.c | 4 ---- src/broadcom/qpu/qpu_pack.c | 4 ---- 2 files changed, 8 deletions(-) diff --git a/src/broadcom/qpu/qpu_instr.c b/src/broadcom/qpu/qpu_instr.c index c07f3802fd..d5eb2b95dd 100644 --- a/src/broadcom/qpu/qpu_instr.c +++ b/src/broadcom/qpu/qpu_instr.c @@ -47,10 +47,6 @@ #define VC5_QPU_SIG_SHIFT 53 #define VC5_QPU_SIG_MASK QPU_MASK(57, 53) -# define VC5_QPU_SIG_THRSW_BIT 0x1 -# define VC5_QPU_SIG_LDUNIF_BIT 0x2 -# define VC5_QPU_SIG_LDTMU_BIT 0x4 -# define VC5_QPU_SIG_LDVARY_BIT 0x8 #define VC5_QPU_COND_SHIFT 46 #define VC5_QPU_COND_MASK QPU_MASK(52, 46) diff --git a/src/broadcom/qpu/qpu_pack.c b/src/broadcom/qpu/qpu_pack.c index f9fb016f61..68df6fe64c 100644 --- a/src/broadcom/qpu/qpu_pack.c +++ b/src/broadcom/qpu/qpu_pack.c @@ -48,10 +48,6 @@ #define VC5_QPU_SIG_SHIFT 53 #define VC5_QPU_SIG_MASK QPU_MASK(57, 53) -# define VC5_QPU_SIG_THRSW_BIT 0x1 -# define VC5_QPU_SIG_LDUNIF_BIT 0x2 -# define VC5_QPU_SIG_LDTMU_BIT 0x4 -# define VC5_QPU_SIG_LDVARY_BIT 0x8 #define VC5_QPU_COND_SHIFT 46 #define VC5_QPU_COND_MASK QPU_MASK(52, 46) -- cgit v1.2.3