From 3d2011cb33317b0fe9b8fe989916efc1841c6ce0 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Thu, 30 Jun 2016 09:14:37 -0700 Subject: i965: Refactor emission of atomic counter operations This will make it easier to add more operations. Signed-off-by: Ian Romanick Reviewed-by: Iago Toral Quiroga --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 19 ++++--------------- src/mesa/drivers/dri/i965/brw_shader.cpp | 16 ++++++++++++++++ src/mesa/drivers/dri/i965/brw_shader.h | 3 +++ src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 19 ++++--------------- 4 files changed, 27 insertions(+), 30 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 042203d244..2016cee347 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -3805,23 +3805,12 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr fs_reg tmp; /* Emit a surface read or atomic op. */ - switch (instr->intrinsic) { - case nir_intrinsic_atomic_counter_read: + if (instr->intrinsic == nir_intrinsic_atomic_counter_read) { tmp = emit_untyped_read(bld, brw_imm_ud(surface), offset, 1, 1); - break; - - case nir_intrinsic_atomic_counter_inc: - tmp = emit_untyped_atomic(bld, brw_imm_ud(surface), offset, fs_reg(), - fs_reg(), 1, 1, BRW_AOP_INC); - break; - - case nir_intrinsic_atomic_counter_dec: + } else { tmp = emit_untyped_atomic(bld, brw_imm_ud(surface), offset, fs_reg(), - fs_reg(), 1, 1, BRW_AOP_PREDEC); - break; - - default: - unreachable("Unreachable"); + fs_reg(), 1, 1, + get_atomic_counter_op(instr->intrinsic)); } /* Assign the result. */ diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 951e6b250d..23f05b826a 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -601,6 +601,22 @@ brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg) return false; } +/** + * Get the appropriate atomic op for an image atomic intrinsic. + */ +unsigned +get_atomic_counter_op(nir_intrinsic_op op) +{ + switch (op) { + case nir_intrinsic_atomic_counter_inc: + return BRW_AOP_INC; + case nir_intrinsic_atomic_counter_dec: + return BRW_AOP_PREDEC; + default: + unreachable("Not reachable."); + } +} + unsigned tesslevel_outer_components(GLenum tes_primitive_mode) { diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index ba2404a7eb..12113b97e1 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -27,6 +27,7 @@ #include "brw_reg.h" #include "brw_defines.h" #include "brw_context.h" +#include "compiler/nir/nir.h" #ifdef __cplusplus #include "brw_ir_allocator.h" @@ -286,6 +287,8 @@ unsigned tesslevel_outer_components(GLenum tes_primitive_mode); unsigned tesslevel_inner_components(GLenum tes_primitive_mode); unsigned writemask_for_backwards_vector(unsigned mask); +unsigned get_atomic_counter_op(nir_intrinsic_op op); + #ifdef __cplusplus } #endif diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp index ba3bbdfaf1..13f74a2b8d 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp @@ -748,24 +748,13 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) dest = get_nir_dest(instr->dest); - switch (instr->intrinsic) { - case nir_intrinsic_atomic_counter_inc: - tmp = emit_untyped_atomic(bld, surface, offset, - src_reg(), src_reg(), - 1, 1, - BRW_AOP_INC); - break; - case nir_intrinsic_atomic_counter_dec: + if (instr->intrinsic == nir_intrinsic_atomic_counter_read) { + tmp = emit_untyped_read(bld, surface, offset, 1, 1); + } else { tmp = emit_untyped_atomic(bld, surface, offset, src_reg(), src_reg(), 1, 1, - BRW_AOP_PREDEC); - break; - case nir_intrinsic_atomic_counter_read: - tmp = emit_untyped_read(bld, surface, offset, 1, 1); - break; - default: - unreachable("Unreachable"); + get_atomic_counter_op(instr->intrinsic)); } bld.MOV(retype(dest, tmp.type), tmp); -- cgit v1.2.3