Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2017-07-31 | radeonsi: add enable_sisched driconf optiondriconf | Nicolai Hähnle | 2 | -0/+7 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: prepare for driver-specific driconf options | Nicolai Hähnle | 3 | -0/+18 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | gallium: add pipe_screen_config to screen_create functions | Nicolai Hähnle | 6 | -8/+14 | |
This allows a more generic mechanism for passing user configurations into drivers by accessing the dri options directly. Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: ensure that temp array allocas are in the entry block | Nicolai Hähnle | 1 | -1/+1 | |
Otherwise, code generation fails. This has become necessary since some shaders are wrapped in control flow. Fixes: 081ac6e5c6d2 ("radeonsi/gfx9: always wrap GS and TCS in an if-block (v2)") Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: enable R600_DEBUG=nir for vertex and fragment shaders | Nicolai Hähnle | 3 | -1/+8 | |
Also, disable geometry and tessellation shaders. Mixing and matching NIR and TGSI shaders should work (and I've tested it for the VS/PS interface), but geometry and tessellation requires VS-as-ES/LS, which isn't implemented yet for NIR. Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: VS as ES/LS are not yet supported with R600_DEBUG=nir | Nicolai Hähnle | 1 | -0/+2 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi/nir: lower uniforms to UBO loads | Nicolai Hähnle | 1 | -0/+10 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi/nir: lower txp instructions | Nicolai Hähnle | 1 | -0/+5 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | ac/nir,radeonsi: add and use ac_shader_abi::frag_pos | Nicolai Hähnle | 1 | -4/+8 | |
v2: update for LLVMValueRefs in ac_shader_abi Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | ac/nir,radeonsi: add and use ac_shader_abi::{ancillary,sample_coverage} | Nicolai Hähnle | 1 | -2/+4 | |
v2: update for LLVMValueRefs in ac_shader_abi Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: tweak next-shader assumptions when streamout is used | Nicolai Hähnle | 1 | -5/+11 | |
VS with streamout is always a HW VS. Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: use new function ac_build_umin for edgeflag clamping | Nicolai Hähnle | 1 | -1/+1 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | ac/nir,radeonsi: add ac_shader_abi::front_face | Nicolai Hähnle | 1 | -4/+12 | |
v2: update for LLVMValueRefs in ac_shader_abi Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: implement and use ac_shader_abi::load_ssbo | Nicolai Hähnle | 2 | -11/+20 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: make get_indirect_index globally visible | Nicolai Hähnle | 2 | -10/+13 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi/nir: perform radeonsi-specific lowering and optimization passes | Nicolai Hähnle | 1 | -0/+41 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi/nir: perform lowering of input/output driver locations | Nicolai Hähnle | 3 | -0/+29 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi/nir: add image descriptor loading | Nicolai Hähnle | 3 | -8/+32 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | ac/nir: add image and write parameter to ac_shader_abi::load_sampler_desc | Nicolai Hähnle | 1 | -1/+2 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi/nir: set si_shader_context::num_{sampler,images} | Nicolai Hähnle | 1 | -0/+5 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi/nir: implement ac_shader_abi::load_sampler_desc | Nicolai Hähnle | 3 | -20/+49 | |
v2: remove enum desc_type from radeonsi (Marek) Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | ac/nir,radeonsi: add ac_shader_abi::chip_class | Nicolai Hähnle | 1 | -0/+2 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi/nir: emit FS outputs | Nicolai Hähnle | 1 | -10/+14 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi/nir: load FS inputs | Nicolai Hähnle | 3 | -11/+52 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi/nir: load VS inputs | Nicolai Hähnle | 3 | -2/+40 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | ac/nir,radeonsi: add ac_shader_abi::load_ubo | Nicolai Hähnle | 1 | -0/+14 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | ac,radeonsi: add ac_shader_abi::emit_outputs for hardware VS shaders | Nicolai Hähnle | 2 | -11/+33 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: pass si_shader_context to get_primitive_id | Nicolai Hähnle | 1 | -6/+5 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: translate NIR to LLVM | Nicolai Hähnle | 3 | -3/+21 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: dump NIR instead of TGSI when appropriate | Nicolai Hähnle | 1 | -1/+5 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: bypass the shader cache for NIR shaders | Nicolai Hähnle | 1 | -2/+3 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: scan NIR shaders to obtain required info | Nicolai Hähnle | 5 | -6/+335 | |
v2: set num_instruction to 2, i.e. 1 + END (Marek) Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: add si_shader_selector::nir | Nicolai Hähnle | 1 | -0/+3 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: implement pipe_screen::get_compiler_options for NIR | Nicolai Hähnle | 1 | -0/+33 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: add nir include paths | Nicolai Hähnle | 1 | -0/+1 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | ac,radeonsi: move some VS input descriptions to ac_shader_abi | Nicolai Hähnle | 2 | -31/+37 | |
v2: use LLVM values instead of function parameter indices Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: store shader function arguments in a structure | Nicolai Hähnle | 1 | -300/+322 | |
Aligns the code a bit more with ac/nir, and simplifies the setup of ac_shader_abi. Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | gallium/targets: link against NIR when building radeonsi | Nicolai Hähnle | 1 | -0/+3 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | st/glsl_to_nir: move nir_lower_io to drivers | Nicolai Hähnle | 2 | -0/+9 | |
This allows drivers more freedom in how exactly they want to lower I/O, e.g. first lowering I/O to temporaries. Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | st/mesa: get rid of st_glsl_types | Nicolai Hähnle | 4 | -10/+26 | |
It's a duplicate of glsl_type::count_attribute_slots. Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | gallium: add PIPE_CAP_NIR_SAMPLERS_AS_DEREF | Nicolai Hähnle | 15 | -0/+15 | |
Reviewed-by: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-31 | radeonsi: expose MRT-draw-calls to HUD | Marek Olšák | 4 | -0/+11 | |
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> | |||||
2017-07-28 | radeonsi: update dirty_level_mask only when flushing or unbinding framebuffer | Marek Olšák | 5 | -43/+59 | |
This fixes corruption with bindless textures in Dawn Of War 3. The do_update_surf_dirtiness mechanism was complicated and dirty_level_mask was only updated after the first draw call. The problem is bindless textures are checked for decompression every draw call and we would only decompress after the first draw call. The solution is to set dirtiness after the last draw call to the framebuffer, so the (unconditional) decompression of bindless textures happens at the right time. Cc: 17.2 <mesa-stable@lists.freedesktop.org> Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> | |||||
2017-07-28 | radeonsi: rely on CLEAR_STATE for clearing UCP and blend color registers | Marek Olšák | 3 | -2/+12 | |
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> | |||||
2017-07-28 | radeonsi: rely on CLEAR_STATE for resetting the framebuffer and sample mask | Marek Olšák | 1 | -3/+10 | |
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> | |||||
2017-07-28 | radeonsi: use CLEAR_STATE to initialize some registers | Marek Olšák | 1 | -54/+4 | |
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> | |||||
2017-07-28 | virgl: drop precise modifier. | Dave Airlie | 1 | -0/+10 | |
The host doesn't understand this yet, so drop it for now. Fixes: virgl regressions. Fixes: af22adee4f (tgsi: add precise flag to tgsi_instruction) Signed-off-by: Dave Airlie <airlied@redhat.com> | |||||
2017-07-27 | radeonsi: bail out instead of crashing if the main shader part failed to compile | Nicolai Hähnle | 1 | -0/+3 | |
Reviewed: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-27 | radeonsi: update a comment for merged shaders | Nicolai Hähnle | 1 | -1/+5 | |
Reviewed: Marek Olšák <marek.olsak@amd.com> | |||||
2017-07-27 | radeonsi/gfx9: dump previous stage LLVM IR for merged shaders | Nicolai Hähnle | 1 | -0/+7 | |
Reviewed: Marek Olšák <marek.olsak@amd.com> |