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-rw-r--r--src/gallium/state_trackers/dri/common/dri_screen.c10
-rw-r--r--src/gallium/state_trackers/dri/common/dri_screen.h2
-rw-r--r--src/gallium/state_trackers/dri/drm/dri2.c1
-rw-r--r--src/gallium/state_trackers/dri/sw/drisw.c1
-rw-r--r--src/mesa/drivers/dri/i915/intel_screen.c13
-rw-r--r--src/mesa/drivers/dri/i965/intel_screen.c12
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.c19
7 files changed, 40 insertions, 18 deletions
diff --git a/src/gallium/state_trackers/dri/common/dri_screen.c b/src/gallium/state_trackers/dri/common/dri_screen.c
index 92cac73d5b..7410dbeba5 100644
--- a/src/gallium/state_trackers/dri/common/dri_screen.c
+++ b/src/gallium/state_trackers/dri/common/dri_screen.c
@@ -47,7 +47,10 @@
#undef false
-PUBLIC const char __driConfigOptions[] =
+const __DRIconfigOptionsExtension gallium_config_options = {
+ .base = { __DRI_CONFIG_OPTIONS, 1 },
+ .xml =
+
DRI_CONF_BEGIN
DRI_CONF_SECTION_QUALITY
DRI_CONF_FORCE_S3TC_ENABLE("false")
@@ -70,7 +73,8 @@ PUBLIC const char __driConfigOptions[] =
DRI_CONF_SECTION_MISCELLANEOUS
DRI_CONF_ALWAYS_HAVE_DEPTH_BUFFER("false")
DRI_CONF_SECTION_END
- DRI_CONF_END;
+ DRI_CONF_END
+};
#define false 0
@@ -415,7 +419,7 @@ dri_init_screen_helper(struct dri_screen *screen,
else
screen->target = PIPE_TEXTURE_RECT;
- driParseOptionInfo(&screen->optionCacheDefaults, __driConfigOptions);
+ driParseOptionInfo(&screen->optionCacheDefaults, gallium_config_options.xml);
driParseConfigFiles(&screen->optionCache,
&screen->optionCacheDefaults,
diff --git a/src/gallium/state_trackers/dri/common/dri_screen.h b/src/gallium/state_trackers/dri/common/dri_screen.h
index 18ede869ad..f263a90e20 100644
--- a/src/gallium/state_trackers/dri/common/dri_screen.h
+++ b/src/gallium/state_trackers/dri/common/dri_screen.h
@@ -133,6 +133,8 @@ dri_destroy_screen_helper(struct dri_screen * screen);
void
dri_destroy_screen(__DRIscreen * sPriv);
+extern const __DRIconfigOptionsExtension gallium_config_options;
+
#endif
/* vim: set sw=3 ts=8 sts=3 expandtab: */
diff --git a/src/gallium/state_trackers/dri/drm/dri2.c b/src/gallium/state_trackers/dri/drm/dri2.c
index 5647968636..868cd25db6 100644
--- a/src/gallium/state_trackers/dri/drm/dri2.c
+++ b/src/gallium/state_trackers/dri/drm/dri2.c
@@ -950,6 +950,7 @@ const struct __DriverAPIRec driDriverAPI = {
PUBLIC const __DRIextension *__driDriverExtensions[] = {
&driCoreExtension.base,
&driDRI2Extension.base,
+ &gallium_config_options.base,
NULL
};
diff --git a/src/gallium/state_trackers/dri/sw/drisw.c b/src/gallium/state_trackers/dri/sw/drisw.c
index 121a2057a3..9f00a53152 100644
--- a/src/gallium/state_trackers/dri/sw/drisw.c
+++ b/src/gallium/state_trackers/dri/sw/drisw.c
@@ -365,6 +365,7 @@ const struct __DriverAPIRec driDriverAPI = {
PUBLIC const __DRIextension *__driDriverExtensions[] = {
&driCoreExtension.base,
&driSWRastExtension.base,
+ &gallium_config_options.base,
NULL
};
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
index 4f8c342e8e..49bae5d67f 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -40,8 +40,11 @@
#include "utils.h"
#include "xmlpool.h"
-PUBLIC const char __driConfigOptions[] =
- DRI_CONF_BEGIN
+static const __DRIconfigOptionsExtension i915_config_options = {
+ .base = { __DRI_CONFIG_OPTIONS, 1 },
+ .xml =
+
+DRI_CONF_BEGIN
DRI_CONF_SECTION_PERFORMANCE
DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
/* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
@@ -75,7 +78,8 @@ PUBLIC const char __driConfigOptions[] =
DRI_CONF_DESC(en, "Perform code generation at shader link time.")
DRI_CONF_OPT_END
DRI_CONF_SECTION_END
-DRI_CONF_END;
+DRI_CONF_END
+};
#include "intel_batchbuffer.h"
#include "intel_buffers.h"
@@ -1109,7 +1113,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
return false;
}
/* parse information in __driConfigOptions */
- driParseOptionInfo(&intelScreen->optionCache, __driConfigOptions);
+ driParseOptionInfo(&intelScreen->optionCache, i915_config_options.xml);
intelScreen->driScrnPriv = psp;
psp->driverPrivate = (void *) intelScreen;
@@ -1203,5 +1207,6 @@ const struct __DriverAPIRec driDriverAPI = {
PUBLIC const __DRIextension *__driDriverExtensions[] = {
&driCoreExtension.base,
&driDRI2Extension.base,
+ &i915_config_options.base,
NULL
};
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index b3d605503f..6cec60eae4 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -40,8 +40,10 @@
#include "utils.h"
#include "xmlpool.h"
-PUBLIC const char __driConfigOptions[] =
- DRI_CONF_BEGIN
+static const __DRIconfigOptionsExtension brw_config_options = {
+ .base = { __DRI_CONFIG_OPTIONS, 1 },
+ .xml =
+DRI_CONF_BEGIN
DRI_CONF_SECTION_PERFORMANCE
DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
/* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
@@ -79,7 +81,8 @@ PUBLIC const char __driConfigOptions[] =
DRI_CONF_DESC(en, "Perform code generation at shader link time.")
DRI_CONF_OPT_END
DRI_CONF_SECTION_END
-DRI_CONF_END;
+DRI_CONF_END
+};
#include "intel_batchbuffer.h"
#include "intel_buffers.h"
@@ -1237,7 +1240,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
return false;
}
/* parse information in __driConfigOptions */
- driParseOptionInfo(&intelScreen->optionCache, __driConfigOptions);
+ driParseOptionInfo(&intelScreen->optionCache, brw_config_options.xml);
intelScreen->driScrnPriv = psp;
psp->driverPrivate = (void *) intelScreen;
@@ -1328,5 +1331,6 @@ const struct __DriverAPIRec driDriverAPI = {
PUBLIC const __DRIextension *__driDriverExtensions[] = {
&driCoreExtension.base,
&driDRI2Extension.base,
+ &brw_config_options.base,
NULL
};
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 1a8dc6c9bb..b0cc2d7084 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -72,7 +72,9 @@ DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
DRI_CONF_OPT_END
#if defined(RADEON_R100) /* R100 */
-PUBLIC const char __driConfigOptions[] =
+static const __DRIconfigOptionsExtension radeon_config_options = {
+ .base = { __DRI_CONFIG_OPTIONS, 1 },
+ .xml =
DRI_CONF_BEGIN
DRI_CONF_SECTION_PERFORMANCE
DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
@@ -94,11 +96,13 @@ DRI_CONF_BEGIN
DRI_CONF_SECTION_DEBUG
DRI_CONF_NO_RAST("false")
DRI_CONF_SECTION_END
-DRI_CONF_END;
+DRI_CONF_END
+};
#elif defined(RADEON_R200)
-
-PUBLIC const char __driConfigOptions[] =
+static const __DRIconfigOptionsExtension radeon_config_options = {
+ .base = { __DRI_CONFIG_OPTIONS, 1 },
+ .xml =
DRI_CONF_BEGIN
DRI_CONF_SECTION_PERFORMANCE
DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
@@ -121,8 +125,8 @@ DRI_CONF_BEGIN
DRI_CONF_SECTION_DEBUG
DRI_CONF_NO_RAST("false")
DRI_CONF_SECTION_END
-DRI_CONF_END;
-
+DRI_CONF_END
+};
#endif
#ifndef RADEON_INFO_TILE_CONFIG
@@ -490,7 +494,7 @@ radeonCreateScreen2(__DRIscreen *sPriv)
radeon_init_debug();
/* parse information in __driConfigOptions */
- driParseOptionInfo (&screen->optionCache, __driConfigOptions);
+ driParseOptionInfo (&screen->optionCache, radeon_config_options.xml);
screen->chip_flags = 0;
@@ -780,5 +784,6 @@ const struct __DriverAPIRec driDriverAPI = {
PUBLIC const __DRIextension *__driDriverExtensions[] = {
&driCoreExtension.base,
&driDRI2Extension.base,
+ &radeon_config_options.base,
NULL
};