diff options
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 30 | ||||
| -rw-r--r-- | src/amd/common/ac_shader_abi.h | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 12 |
3 files changed, 26 insertions, 17 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 622b97896d..542f67a73f 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -132,7 +132,6 @@ struct nir_to_llvm_context { LLVMValueRef sample_pos_offset; LLVMValueRef persp_sample, persp_center, persp_centroid; LLVMValueRef linear_sample, linear_center, linear_centroid; - LLVMValueRef frag_pos[4]; LLVMTypeRef i1; LLVMTypeRef i8; @@ -809,10 +808,10 @@ static void create_function(struct nir_to_llvm_context *ctx) add_vgpr_argument(&args, ctx->v2i32, &ctx->linear_center); /* linear center */ add_vgpr_argument(&args, ctx->v2i32, &ctx->linear_centroid); /* linear centroid */ add_vgpr_argument(&args, ctx->f32, NULL); /* line stipple tex */ - add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[0]); /* pos x float */ - add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[1]); /* pos y float */ - add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[2]); /* pos z float */ - add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[3]); /* pos w float */ + add_vgpr_argument(&args, ctx->f32, &ctx->abi.frag_pos[0]); /* pos x float */ + add_vgpr_argument(&args, ctx->f32, &ctx->abi.frag_pos[1]); /* pos y float */ + add_vgpr_argument(&args, ctx->f32, &ctx->abi.frag_pos[2]); /* pos z float */ + add_vgpr_argument(&args, ctx->f32, &ctx->abi.frag_pos[3]); /* pos w float */ add_vgpr_argument(&args, ctx->i32, &ctx->abi.front_face); /* front face */ add_vgpr_argument(&args, ctx->i32, &ctx->abi.ancillary); /* ancillary */ add_vgpr_argument(&args, ctx->i32, &ctx->abi.sample_coverage); /* sample coverage */ @@ -3309,7 +3308,10 @@ static LLVMValueRef get_image_coords(struct ac_nir_context *ctx, fmask_load_address[2] = NULL; if (add_frag_pos) { for (chan = 0; chan < 2; ++chan) - fmask_load_address[chan] = LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan], LLVMBuildFPToUI(ctx->ac.builder, ctx->nctx->frag_pos[chan], ctx->ac.i32, ""), ""); + fmask_load_address[chan] = + LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan], + LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan], + ctx->ac.i32, ""), ""); } sample_index = adjust_sample_index_using_fmask(&ctx->ac, fmask_load_address[0], @@ -3333,7 +3335,8 @@ static LLVMValueRef get_image_coords(struct ac_nir_context *ctx, if (add_frag_pos) { for (chan = 0; chan < count; ++chan) - coords[chan] = LLVMBuildAdd(ctx->ac.builder, coords[chan], LLVMBuildFPToUI(ctx->ac.builder, ctx->nctx->frag_pos[chan], ctx->ac.i32, ""), ""); + coords[chan] = LLVMBuildAdd(ctx->ac.builder, coords[chan], LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan], + ctx->ac.i32, ""), ""); } if (is_ms) { coords[count] = sample_index; @@ -3745,12 +3748,12 @@ static LLVMValueRef load_sample_position(struct nir_to_llvm_context *ctx, return result; } -static LLVMValueRef load_sample_pos(struct nir_to_llvm_context *ctx) +static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx) { LLVMValueRef values[2]; - values[0] = emit_ffract(&ctx->ac, ctx->frag_pos[0]); - values[1] = emit_ffract(&ctx->ac, ctx->frag_pos[1]); + values[0] = emit_ffract(&ctx->ac, ctx->abi->frag_pos[0]); + values[1] = emit_ffract(&ctx->ac, ctx->abi->frag_pos[1]); return ac_build_gather_values(&ctx->ac, values, 2); } @@ -4004,7 +4007,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx, result = unpack_param(ctx->nctx, ctx->abi->ancillary, 8, 4); break; case nir_intrinsic_load_sample_pos: - result = load_sample_pos(ctx->nctx); + result = load_sample_pos(ctx); break; case nir_intrinsic_load_sample_mask_in: result = ctx->abi->sample_coverage; @@ -5011,9 +5014,10 @@ handle_fs_inputs_pre(struct nir_to_llvm_context *ctx, ++index; } else if (i == VARYING_SLOT_POS) { for(int i = 0; i < 3; ++i) - inputs[i] = ctx->frag_pos[i]; + inputs[i] = ctx->abi.frag_pos[i]; - inputs[3] = ac_build_fdiv(&ctx->ac, ctx->f32one, ctx->frag_pos[3]); + inputs[3] = ac_build_fdiv(&ctx->ac, ctx->f32one, + ctx->abi.frag_pos[3]); } } ctx->shader_info->fs.num_interp = index; diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h index fd62f22e2b..c2dd1c3a80 100644 --- a/src/amd/common/ac_shader_abi.h +++ b/src/amd/common/ac_shader_abi.h @@ -44,6 +44,7 @@ struct ac_shader_abi { LLVMValueRef draw_id; LLVMValueRef vertex_id; LLVMValueRef instance_id; + LLVMValueRef frag_pos[4]; LLVMValueRef front_face; LLVMValueRef ancillary; LLVMValueRef sample_coverage; diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index e37052cbe7..670b4a76f3 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -4534,10 +4534,14 @@ static void create_function(struct si_shader_context *ctx) add_arg_checked(&fninfo, ARG_VGPR, ctx->v2i32, SI_PARAM_LINEAR_CENTER); add_arg_checked(&fninfo, ARG_VGPR, ctx->v2i32, SI_PARAM_LINEAR_CENTROID); add_arg_checked(&fninfo, ARG_VGPR, ctx->f32, SI_PARAM_LINE_STIPPLE_TEX); - add_arg_checked(&fninfo, ARG_VGPR, ctx->f32, SI_PARAM_POS_X_FLOAT); - add_arg_checked(&fninfo, ARG_VGPR, ctx->f32, SI_PARAM_POS_Y_FLOAT); - add_arg_checked(&fninfo, ARG_VGPR, ctx->f32, SI_PARAM_POS_Z_FLOAT); - add_arg_checked(&fninfo, ARG_VGPR, ctx->f32, SI_PARAM_POS_W_FLOAT); + add_arg_assign_checked(&fninfo, ARG_VGPR, ctx->f32, + &ctx->abi.frag_pos[0], SI_PARAM_POS_X_FLOAT); + add_arg_assign_checked(&fninfo, ARG_VGPR, ctx->f32, + &ctx->abi.frag_pos[1], SI_PARAM_POS_Y_FLOAT); + add_arg_assign_checked(&fninfo, ARG_VGPR, ctx->f32, + &ctx->abi.frag_pos[2], SI_PARAM_POS_Z_FLOAT); + add_arg_assign_checked(&fninfo, ARG_VGPR, ctx->f32, + &ctx->abi.frag_pos[3], SI_PARAM_POS_W_FLOAT); add_arg_assign_checked(&fninfo, ARG_VGPR, ctx->i32, &ctx->abi.front_face, SI_PARAM_FRONT_FACE); shader->info.face_vgpr_index = 20; |