diff options
| author | Anuj Phogat <anuj.phogat@gmail.com> | 2017-05-15 13:04:57 -0700 |
|---|---|---|
| committer | Anuj Phogat <anuj.phogat@gmail.com> | 2017-06-09 16:02:59 -0700 |
| commit | 8c43e33560470e0630ad0eab65e7c6ecc4259b35 (patch) | |
| tree | 1da90e163616c4fbc07eadd8e11e68ed82b26754 /src | |
| parent | 111881abac0dda73a20e491a219a1d7db6512f82 (diff) | |
i965/cnl: Start using CNL MOCS defines
CNL MOCS defines are duplicates of SKL MOCS defines.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.c | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state.h | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/genX_state_upload.c | 4 |
4 files changed, 16 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 70aecfba19..355f936f06 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -110,9 +110,9 @@ brw_blorp_init(struct brw_context *brw) brw->blorp.exec = gen9_blorp_exec; break; case 10: - brw->blorp.mocs.tex = SKL_MOCS_WB; - brw->blorp.mocs.rb = SKL_MOCS_PTE; - brw->blorp.mocs.vb = SKL_MOCS_WB; + brw->blorp.mocs.tex = CNL_MOCS_WB; + brw->blorp.mocs.rb = CNL_MOCS_PTE; + brw->blorp.mocs.vb = CNL_MOCS_WB; brw->blorp.exec = gen10_blorp_exec; break; default: diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 6f5afafac0..d9c35c0e16 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -407,6 +407,14 @@ void upload_gs_state_for_tf(struct brw_context *brw); /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */ #define SKL_MOCS_PTE (1 << 1) +/* Cannonlake: MOCS is now an index into an array of 62 different caching + * configurations programmed by the kernel. + */ +/* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ +#define CNL_MOCS_WB (2 << 1) +/* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */ +#define CNL_MOCS_PTE (1 << 1) + #ifdef __cplusplus } #endif diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index a3e568ecb3..00edce4274 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -64,12 +64,14 @@ uint32_t tex_mocs[] = { [7] = GEN7_MOCS_L3, [8] = BDW_MOCS_WB, [9] = SKL_MOCS_WB, + [10] = CNL_MOCS_WB, }; uint32_t rb_mocs[] = { [7] = GEN7_MOCS_L3, [8] = BDW_MOCS_PTE, [9] = SKL_MOCS_PTE, + [10] = CNL_MOCS_PTE, }; static void diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index 041bcd2a8c..0a32e46011 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -344,7 +344,9 @@ genX(emit_vertex_buffer_state)(struct brw_context *brw, #endif #endif -#if GEN_GEN == 9 +#if GEN_GEN == 10 + .VertexBufferMOCS = CNL_MOCS_WB, +#elif GEN_GEN == 9 .VertexBufferMOCS = SKL_MOCS_WB, #elif GEN_GEN == 8 .VertexBufferMOCS = BDW_MOCS_WB, |