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authorNicolai Hähnle <nicolai.haehnle@amd.com>2017-08-23 17:41:27 +0200
committerNicolai Hähnle <nicolai.haehnle@amd.com>2017-08-23 18:34:06 +0200
commit5e6c212753eb8a0fc481a3e33e2820ca74fc643c (patch)
treef760b2a6c3d803c44530c3011e76a7d4aff65198 /src/gallium/docs/source
parent7fb4b6f27056679e0271ba90dabf7e8a7bfbd181 (diff)
gallium: all drivers should accept two-dimensional constant buffer indexing
Most older drivers seem to just ignore the Dimension setting, so virtually no changes should be needed.
Diffstat (limited to 'src/gallium/docs/source')
-rw-r--r--src/gallium/docs/source/screen.rst11
1 files changed, 3 insertions, 8 deletions
diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
index be14ddd0c0..93d94a48e6 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -446,21 +446,16 @@ support different features.
* ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes.
* ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound
to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will
- only permit binding one constant buffer per shader, and the shaders will
- not permit two-dimensional access to constants.
+ only permit binding one constant buffer per shader.
If a value greater than 0 is returned, the driver can have multiple
-constant buffers bound to shader stages. The CONST register file can
-be accessed with two-dimensional indices, like in the example below.
+constant buffers bound to shader stages. The CONST register file is
+accessed with two-dimensional indices, like in the example below.
DCL CONST[0][0..7] # declare first 8 vectors of constbuf 0
DCL CONST[3][0] # declare first vector of constbuf 3
MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0
-For backwards compatibility, one-dimensional access to CONST register
-file is still supported. In that case, the constbuf index is assumed
-to be 0.
-
* ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
* ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
* ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing