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author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2017-09-09 12:35:40 +0200 |
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committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2018-03-14 09:04:04 +0100 |
commit | a464357c82c07261e53f6adc75fd36367b6dc5bf (patch) | |
tree | 769de8c6948e29669e43aa8bd987ad369d8fdadc | |
parent | 2865fde730485aaa216962587412f3634b49e548 (diff) |
DBG HACK add si_sethalt
-rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 8ae742c93f..46c6af5edf 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -5325,6 +5325,8 @@ int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader) !mainb->rodata_size); assert(!epilog || !epilog->rodata_size); + bo_size += 16; + r600_resource_reference(&shader->bo, NULL); shader->bo = (struct r600_resource*) si_aligned_buffer_create(&sscreen->b, @@ -5341,6 +5343,13 @@ int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader) PIPE_TRANSFER_READ_WRITE | PIPE_TRANSFER_UNSYNCHRONIZED); + if (debug_get_bool_option("si_sethalt", false) && + shader->selector->info.processor == PIPE_SHADER_FRAGMENT && + shader->config.spi_ps_input_ena & C_0286CC_ANCILLARY_ENA) { + *(uint32_t*)ptr = 0xbf8d0001; /* s_sethalt 1 */ + ptr += 4; + } + /* Don't use util_memcpy_cpu_to_le32. LLVM binaries are * endian-independent. */ if (prolog) { @@ -7964,6 +7973,7 @@ static bool si_shader_select_ps_parts(struct si_screen *sscreen, if (!shader->key.part.ps.epilog.poly_line_smoothing && !shader->selector->info.reads_samplemask) shader->config.spi_ps_input_ena &= C_0286CC_SAMPLE_COVERAGE_ENA; +// shader->config.spi_ps_input_ena |= shader->config.spi_ps_input_addr & ~C_0286CC_POS_FIXED_PT_ENA; return true; } |