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author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2017-06-23 19:11:21 +0200 |
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committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2017-07-13 13:27:43 +0200 |
commit | 4736296f947bb856f7330cc49d6988c4797d178b (patch) | |
tree | ae79032240dccb6fd4bfc38c003d6f0e750b0cff | |
parent | 9c87aa47f36a6f714fca52af6045e3b4d54d6690 (diff) |
st/glsl_to_tgsi: extract IR lowering and optimization as separate function
Separate the NIR and IR code paths more cleanly.
-rw-r--r-- | src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 238 |
1 files changed, 124 insertions, 114 deletions
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 9d4b458d7b..e6201cff14 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -7017,6 +7017,128 @@ has_unsupported_control_flow(exec_list *ir, return visitor.unsupported; } +static void +st_lower_and_optimize_ir(struct st_context *st, gl_linked_shader *shader) +{ + struct pipe_screen *pscreen = st->pipe->screen; + struct gl_context *ctx = st->ctx; + exec_list *ir = shader->ir; + gl_shader_stage stage = shader->Stage; + const struct gl_shader_compiler_options *options = + &ctx->Const.ShaderCompilerOptions[stage]; + enum pipe_shader_type ptarget = st_shader_stage_to_ptarget(stage); + bool have_dround = pscreen->get_shader_param(pscreen, ptarget, + PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED); + bool have_dfrexp = pscreen->get_shader_param(pscreen, ptarget, + PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED); + unsigned if_threshold = pscreen->get_shader_param(pscreen, ptarget, + PIPE_SHADER_CAP_LOWER_IF_THRESHOLD); + + /* If there are forms of indirect addressing that the driver + * cannot handle, perform the lowering pass. + */ + unsigned lower_var_index_bits = 0; + if (options->EmitNoIndirectInput) + lower_var_index_bits |= lower_variable_index_input; + if (options->EmitNoIndirectOutput) + lower_var_index_bits |= lower_variable_index_output; + if (options->EmitNoIndirectTemp) + lower_var_index_bits |= lower_variable_index_temp; + if (options->EmitNoIndirectUniform) + lower_var_index_bits |= lower_variable_index_uniform; + + if (lower_var_index_bits) + lower_variable_index_to_cond_assign(stage, ir, lower_var_index_bits); + + if (!pscreen->get_param(pscreen, PIPE_CAP_INT64_DIVMOD)) + lower_64bit_integer_instructions(ir, DIV64 | MOD64); + + if (ctx->Extensions.ARB_shading_language_packing) { + unsigned lower_inst = LOWER_PACK_SNORM_2x16 | + LOWER_UNPACK_SNORM_2x16 | + LOWER_PACK_UNORM_2x16 | + LOWER_UNPACK_UNORM_2x16 | + LOWER_PACK_SNORM_4x8 | + LOWER_UNPACK_SNORM_4x8 | + LOWER_UNPACK_UNORM_4x8 | + LOWER_PACK_UNORM_4x8; + + if (ctx->Extensions.ARB_gpu_shader5) + lower_inst |= LOWER_PACK_USE_BFI | + LOWER_PACK_USE_BFE; + if (!ctx->st->has_half_float_packing) + lower_inst |= LOWER_PACK_HALF_2x16 | + LOWER_UNPACK_HALF_2x16; + + lower_packing_builtins(ir, lower_inst); + } + + if (!pscreen->get_param(pscreen, PIPE_CAP_TEXTURE_GATHER_OFFSETS)) + lower_offset_arrays(ir); + do_mat_op_to_vec(ir); + + if (stage == MESA_SHADER_FRAGMENT) + lower_blend_equation_advanced(shader); + + lower_instructions(ir, + MOD_TO_FLOOR | + FDIV_TO_MUL_RCP | + EXP_TO_EXP2 | + LOG_TO_LOG2 | + LDEXP_TO_ARITH | + (have_dfrexp ? 0 : DFREXP_DLDEXP_TO_ARITH) | + CARRY_TO_ARITH | + BORROW_TO_ARITH | + (have_dround ? 0 : DOPS_TO_DFRAC) | + (options->EmitNoPow ? POW_TO_EXP2 : 0) | + (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0) | + (options->EmitNoSat ? SAT_TO_CLAMP : 0) | + (ctx->Const.ForceGLSLAbsSqrt ? SQRT_TO_ABS_SQRT : 0) | + /* Assume that if ARB_gpu_shader5 is not supported + * then all of the extended integer functions need + * lowering. It may be necessary to add some caps + * for individual instructions. + */ + (!ctx->Extensions.ARB_gpu_shader5 + ? BIT_COUNT_TO_MATH | + EXTRACT_TO_SHIFTS | + INSERT_TO_SHIFTS | + REVERSE_TO_SHIFTS | + FIND_LSB_TO_FLOAT_CAST | + FIND_MSB_TO_FLOAT_CAST | + IMUL_HIGH_TO_MUL + : 0)); + + do_vec_index_to_cond_assign(ir); + lower_vector_insert(ir, true); + lower_quadop_vector(ir, false); + lower_noise(ir); + if (options->MaxIfDepth == 0) { + lower_discard(ir); + } + + if (ctx->Const.GLSLOptimizeConservatively) { + /* Do it once and repeat only if there's unsupported control flow. */ + do { + do_common_optimization(ir, true, true, options, + ctx->Const.NativeIntegers); + lower_if_to_cond_assign(shader->Stage, ir, + options->MaxIfDepth, if_threshold); + } while (has_unsupported_control_flow(ir, options)); + } else { + /* Repeat it until it stops making changes. */ + bool progress; + do { + progress = do_common_optimization(ir, true, true, options, + ctx->Const.NativeIntegers); + progress |= lower_if_to_cond_assign(shader->Stage, ir, + options->MaxIfDepth, if_threshold); + } while (progress); + } + + validate_ir_tree(ir); +} + extern "C" { /** @@ -7041,121 +7163,9 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) continue; struct gl_linked_shader *shader = prog->_LinkedShaders[i]; - exec_list *ir = shader->ir; - gl_shader_stage stage = shader->Stage; - const struct gl_shader_compiler_options *options = - &ctx->Const.ShaderCompilerOptions[stage]; - enum pipe_shader_type ptarget = st_shader_stage_to_ptarget(stage); - bool have_dround = pscreen->get_shader_param(pscreen, ptarget, - PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED); - bool have_dfrexp = pscreen->get_shader_param(pscreen, ptarget, - PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED); - unsigned if_threshold = pscreen->get_shader_param(pscreen, ptarget, - PIPE_SHADER_CAP_LOWER_IF_THRESHOLD); - - /* If there are forms of indirect addressing that the driver - * cannot handle, perform the lowering pass. - */ - unsigned lower_var_index_bits = 0; - if (options->EmitNoIndirectInput) - lower_var_index_bits |= lower_variable_index_input; - if (options->EmitNoIndirectOutput) - lower_var_index_bits |= lower_variable_index_output; - if (options->EmitNoIndirectTemp) - lower_var_index_bits |= lower_variable_index_temp; - if (options->EmitNoIndirectUniform) - lower_var_index_bits |= lower_variable_index_uniform; - - if (lower_var_index_bits) - lower_variable_index_to_cond_assign(stage, ir, lower_var_index_bits); - - if (!pscreen->get_param(pscreen, PIPE_CAP_INT64_DIVMOD)) - lower_64bit_integer_instructions(ir, DIV64 | MOD64); - - if (ctx->Extensions.ARB_shading_language_packing) { - unsigned lower_inst = LOWER_PACK_SNORM_2x16 | - LOWER_UNPACK_SNORM_2x16 | - LOWER_PACK_UNORM_2x16 | - LOWER_UNPACK_UNORM_2x16 | - LOWER_PACK_SNORM_4x8 | - LOWER_UNPACK_SNORM_4x8 | - LOWER_UNPACK_UNORM_4x8 | - LOWER_PACK_UNORM_4x8; - - if (ctx->Extensions.ARB_gpu_shader5) - lower_inst |= LOWER_PACK_USE_BFI | - LOWER_PACK_USE_BFE; - if (!ctx->st->has_half_float_packing) - lower_inst |= LOWER_PACK_HALF_2x16 | - LOWER_UNPACK_HALF_2x16; - - lower_packing_builtins(ir, lower_inst); - } - - if (!pscreen->get_param(pscreen, PIPE_CAP_TEXTURE_GATHER_OFFSETS)) - lower_offset_arrays(ir); - do_mat_op_to_vec(ir); - - if (stage == MESA_SHADER_FRAGMENT) - lower_blend_equation_advanced(shader); - - lower_instructions(ir, - MOD_TO_FLOOR | - FDIV_TO_MUL_RCP | - EXP_TO_EXP2 | - LOG_TO_LOG2 | - LDEXP_TO_ARITH | - (have_dfrexp ? 0 : DFREXP_DLDEXP_TO_ARITH) | - CARRY_TO_ARITH | - BORROW_TO_ARITH | - (have_dround ? 0 : DOPS_TO_DFRAC) | - (options->EmitNoPow ? POW_TO_EXP2 : 0) | - (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0) | - (options->EmitNoSat ? SAT_TO_CLAMP : 0) | - (ctx->Const.ForceGLSLAbsSqrt ? SQRT_TO_ABS_SQRT : 0) | - /* Assume that if ARB_gpu_shader5 is not supported - * then all of the extended integer functions need - * lowering. It may be necessary to add some caps - * for individual instructions. - */ - (!ctx->Extensions.ARB_gpu_shader5 - ? BIT_COUNT_TO_MATH | - EXTRACT_TO_SHIFTS | - INSERT_TO_SHIFTS | - REVERSE_TO_SHIFTS | - FIND_LSB_TO_FLOAT_CAST | - FIND_MSB_TO_FLOAT_CAST | - IMUL_HIGH_TO_MUL - : 0)); - - do_vec_index_to_cond_assign(ir); - lower_vector_insert(ir, true); - lower_quadop_vector(ir, false); - lower_noise(ir); - if (options->MaxIfDepth == 0) { - lower_discard(ir); - } - - if (ctx->Const.GLSLOptimizeConservatively) { - /* Do it once and repeat only if there's unsupported control flow. */ - do { - do_common_optimization(ir, true, true, options, - ctx->Const.NativeIntegers); - lower_if_to_cond_assign((gl_shader_stage)i, ir, - options->MaxIfDepth, if_threshold); - } while (has_unsupported_control_flow(ir, options)); - } else { - /* Repeat it until it stops making changes. */ - bool progress; - do { - progress = do_common_optimization(ir, true, true, options, - ctx->Const.NativeIntegers); - progress |= lower_if_to_cond_assign((gl_shader_stage)i, ir, - options->MaxIfDepth, if_threshold); - } while (progress); - } - validate_ir_tree(ir); + if (!shader->nir) + st_lower_and_optimize_ir(ctx->st, shader); } build_program_resource_list(ctx, prog); |