diff options
| author | Leo Liu <leo.liu@amd.com> | 2017-08-21 11:50:38 -0400 |
|---|---|---|
| committer | Leo Liu <leo.liu@amd.com> | 2017-08-22 15:12:19 -0400 |
| commit | df6c087a383f801c32352309e9b858340989955d (patch) | |
| tree | 527e3c8975600e1fa9beec8ee41c7ac65ae4c1ac | |
| parent | e29ccaac298d04ad4272af2d8b8d7a953c523e28 (diff) | |
radeon/vcn: correct target buffer pitch calculation
since the way should be as same as UVD
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
| -rw-r--r-- | src/gallium/drivers/radeon/radeon_vcn_dec.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index a60b969a27..51391627d5 100644 --- a/src/gallium/drivers/radeon/radeon_vcn_dec.c +++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c @@ -631,7 +631,7 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec, decode->db_pitch = align(dec->base.width, 32); decode->db_surf_tile_config = 0; - decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.bpe;; + decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w; decode->dt_uv_pitch = decode->dt_pitch / 2; decode->dt_tiling_mode = 0; |