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authorSamuel Pitoiset <samuel.pitoiset@gmail.com>2017-06-28 18:48:14 +0200
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>2017-08-22 11:34:23 +0200
commita5ff4a8e2e5bc1b7107a1d902feaf4d5edb96b3f (patch)
tree9a8ce37e3c10c64d077fe7b9ac6d602c1b2552c3
parenta29ef75565e14f785c071ac99044300003168fa8 (diff)
radeonsi: only initialize dirty_mask when CE is used
Looks like it's useless to initialize that field when CE is unused. This will also allow to declare more than 64 elements for the array of bindless descriptors. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 1f6e704b4b..c26b8291cf 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -125,19 +125,20 @@ static void si_init_descriptors(struct si_context *sctx,
unsigned num_ce_slots,
unsigned *ce_offset)
{
- assert(num_elements <= sizeof(desc->dirty_mask)*8);
-
desc->list = CALLOC(num_elements, element_dw_size * 4);
desc->element_dw_size = element_dw_size;
desc->num_elements = num_elements;
desc->first_ce_slot = sctx->ce_ib ? first_ce_slot : 0;
desc->num_ce_slots = sctx->ce_ib ? num_ce_slots : 0;
- desc->dirty_mask = u_bit_consecutive64(0, num_elements);
+ desc->dirty_mask = 0;
desc->shader_userdata_offset = shader_userdata_index * 4;
if (desc->num_ce_slots) {
+ assert(num_elements <= sizeof(desc->dirty_mask)*8);
+
desc->uses_ce = true;
desc->ce_offset = *ce_offset;
+ desc->dirty_mask = u_bit_consecutive64(0, num_elements);
*ce_offset += element_dw_size * desc->num_ce_slots * 4;
}