tgsi: macro-ify the opcodes table

So we can easily re-arrange members of tgsi_opcode_info, and readers of
the code don't have to guess what all the 0s mean.

Mostly done with regex search&replace.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

3 files changed, 263 insertions, 251 deletions

diff --git a/src/gallium/auxiliary/Makefile.sources b/src/gallium/auxiliary/Makefile.sources
index 1b0eeb9958..36d6c8fb4f 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -151,6 +151,7 @@ C_SOURCES := \
 	tgsi/tgsi_from_mesa.h \
 	tgsi/tgsi_info.c \
 	tgsi/tgsi_info.h \
+	tgsi/tgsi_info_opcodes.h \
 	tgsi/tgsi_iterate.c \
 	tgsi/tgsi_iterate.h \
 	tgsi/tgsi_lowering.c \
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c
index 472c088c7d..5112826aaf 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -35,261 +35,21 @@
 #define CHAN TGSI_OUTPUT_CHAN_DEPENDENT
 #define OTHR TGSI_OUTPUT_OTHER
 
-static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
-{
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "ARL", TGSI_OPCODE_ARL },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "MOV", TGSI_OPCODE_MOV },
-   { 1, 1, 0, 0, 0, 0, 0, CHAN, "LIT", TGSI_OPCODE_LIT },
-   { 1, 1, 0, 0, 0, 0, 0, REPL, "RCP", TGSI_OPCODE_RCP },
-   { 1, 1, 0, 0, 0, 0, 0, REPL, "RSQ", TGSI_OPCODE_RSQ },
-   { 1, 1, 0, 0, 0, 0, 0, CHAN, "EXP", TGSI_OPCODE_EXP },
-   { 1, 1, 0, 0, 0, 0, 0, CHAN, "LOG", TGSI_OPCODE_LOG },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "MUL", TGSI_OPCODE_MUL },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "ADD", TGSI_OPCODE_ADD },
-   { 1, 2, 0, 0, 0, 0, 0, REPL, "DP3", TGSI_OPCODE_DP3 },
-   { 1, 2, 0, 0, 0, 0, 0, REPL, "DP4", TGSI_OPCODE_DP4 },
-   { 1, 2, 0, 0, 0, 0, 0, CHAN, "DST", TGSI_OPCODE_DST },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "MIN", TGSI_OPCODE_MIN },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "MAX", TGSI_OPCODE_MAX },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "SLT", TGSI_OPCODE_SLT },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "SGE", TGSI_OPCODE_SGE },
-   { 1, 3, 0, 0, 0, 0, 0, COMP, "MAD", TGSI_OPCODE_MAD },
-   { 1, 2, 1, 0, 0, 0, 0, OTHR, "TEX_LZ", TGSI_OPCODE_TEX_LZ },
-   { 1, 3, 0, 0, 0, 0, 0, COMP, "LRP", TGSI_OPCODE_LRP },
-   { 1, 3, 0, 0, 0, 0, 0, COMP, "FMA", TGSI_OPCODE_FMA },
-   { 1, 1, 0, 0, 0, 0, 0, REPL, "SQRT", TGSI_OPCODE_SQRT },
-   { 1, 3, 0, 0, 0, 0, 0, REPL, "", 21 }, /* removed */
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "F2U64", TGSI_OPCODE_F2U64 },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "F2I64", TGSI_OPCODE_F2I64 },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "FRC", TGSI_OPCODE_FRC },
-   { 1, 2, 1, 0, 0, 0, 0, OTHR, "TXF_LZ", TGSI_OPCODE_TXF_LZ },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "FLR", TGSI_OPCODE_FLR },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "ROUND", TGSI_OPCODE_ROUND },
-   { 1, 1, 0, 0, 0, 0, 0, REPL, "EX2", TGSI_OPCODE_EX2 },
-   { 1, 1, 0, 0, 0, 0, 0, REPL, "LG2", TGSI_OPCODE_LG2 },
-   { 1, 2, 0, 0, 0, 0, 0, REPL, "POW", TGSI_OPCODE_POW },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "", 31 }, /* removed */
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "U2I64", TGSI_OPCODE_U2I64 },
-   { 1, 0, 0, 0, 0, 0, 0, OTHR, "CLOCK", TGSI_OPCODE_CLOCK },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "I2I64", TGSI_OPCODE_I2I64 },
-   { 1, 2, 0, 0, 0, 0, 0, REPL, "", 35 }, /* removed */
-   { 1, 1, 0, 0, 0, 0, 0, REPL, "COS", TGSI_OPCODE_COS },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DDX", TGSI_OPCODE_DDX },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DDY", TGSI_OPCODE_DDY },
-   { 0, 0, 0, 0, 0, 0, 0, NONE, "KILL", TGSI_OPCODE_KILL },
-   { 1, 1, 0, 0, 0, 0, 0, REPL, "PK2H", TGSI_OPCODE_PK2H },
-   { 1, 1, 0, 0, 0, 0, 0, REPL, "PK2US", TGSI_OPCODE_PK2US },
-   { 1, 1, 0, 0, 0, 0, 0, REPL, "PK4B", TGSI_OPCODE_PK4B },
-   { 1, 1, 0, 0, 0, 0, 0, REPL, "PK4UB", TGSI_OPCODE_PK4UB },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "D2U64", TGSI_OPCODE_D2U64 },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "SEQ", TGSI_OPCODE_SEQ },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "D2I64", TGSI_OPCODE_D2I64 },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "SGT", TGSI_OPCODE_SGT },
-   { 1, 1, 0, 0, 0, 0, 0, REPL, "SIN", TGSI_OPCODE_SIN },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "SLE", TGSI_OPCODE_SLE },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "SNE", TGSI_OPCODE_SNE },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "U642D", TGSI_OPCODE_U642D },
-   { 1, 2, 1, 0, 0, 0, 0, OTHR, "TEX", TGSI_OPCODE_TEX },
-   { 1, 4, 1, 0, 0, 0, 0, OTHR, "TXD", TGSI_OPCODE_TXD },
-   { 1, 2, 1, 0, 0, 0, 0, OTHR, "TXP", TGSI_OPCODE_TXP },
-   { 1, 1, 0, 0, 0, 0, 0, CHAN, "UP2H", TGSI_OPCODE_UP2H },
-   { 1, 1, 0, 0, 0, 0, 0, CHAN, "UP2US", TGSI_OPCODE_UP2US },
-   { 1, 1, 0, 0, 0, 0, 0, CHAN, "UP4B", TGSI_OPCODE_UP4B },
-   { 1, 1, 0, 0, 0, 0, 0, CHAN, "UP4UB", TGSI_OPCODE_UP4UB },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "U642F", TGSI_OPCODE_U642F },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "I642F", TGSI_OPCODE_I642F },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "ARR", TGSI_OPCODE_ARR },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "I642D", TGSI_OPCODE_I642D },
-   { 0, 0, 0, 0, 1, 0, 0, NONE, "CAL", TGSI_OPCODE_CAL },
-   { 0, 0, 0, 0, 0, 0, 0, NONE, "RET", TGSI_OPCODE_RET },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "SSG", TGSI_OPCODE_SSG },
-   { 1, 3, 0, 0, 0, 0, 0, COMP, "CMP", TGSI_OPCODE_CMP },
-   { 1, 1, 0, 0, 0, 0, 0, CHAN, "", 67 }, /* removed */
-   { 1, 2, 1, 0, 0, 0, 0, OTHR, "TXB", TGSI_OPCODE_TXB },
-   { 1, 1, 0, 0, 0, 0, 0, OTHR, "FBFETCH", TGSI_OPCODE_FBFETCH },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "DIV", TGSI_OPCODE_DIV },
-   { 1, 2, 0, 0, 0, 0, 0, REPL, "DP2", TGSI_OPCODE_DP2 },
-   { 1, 2, 1, 0, 0, 0, 0, OTHR, "TXL", TGSI_OPCODE_TXL },
-   { 0, 0, 0, 0, 0, 0, 0, NONE, "BRK", TGSI_OPCODE_BRK },
-   { 0, 1, 0, 0, 1, 0, 1, NONE, "IF", TGSI_OPCODE_IF },
-   { 0, 1, 0, 0, 1, 0, 1, NONE, "UIF", TGSI_OPCODE_UIF },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "READ_INVOC", TGSI_OPCODE_READ_INVOC },
-   { 0, 0, 0, 0, 1, 1, 1, NONE, "ELSE", TGSI_OPCODE_ELSE },
-   { 0, 0, 0, 0, 0, 1, 0, NONE, "ENDIF", TGSI_OPCODE_ENDIF },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DDX_FINE", TGSI_OPCODE_DDX_FINE },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DDY_FINE", TGSI_OPCODE_DDY_FINE },
-   { 0, 1, 0, 0, 0, 0, 0, NONE, "", 81 }, /* removed */
-   { 1, 0, 0, 0, 0, 0, 0, NONE, "", 82 }, /* removed */
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "CEIL", TGSI_OPCODE_CEIL },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "I2F", TGSI_OPCODE_I2F },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "NOT", TGSI_OPCODE_NOT },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "TRUNC", TGSI_OPCODE_TRUNC },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "SHL", TGSI_OPCODE_SHL },
-   { 1, 1, 0, 0, 0, 0, 0, OTHR, "BALLOT", TGSI_OPCODE_BALLOT },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "AND", TGSI_OPCODE_AND },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "OR", TGSI_OPCODE_OR },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "MOD", TGSI_OPCODE_MOD },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "XOR", TGSI_OPCODE_XOR },
-   { 1, 3, 0, 0, 0, 0, 0, COMP, "", 93 }, /* removed */
-   { 1, 2, 1, 0, 0, 0, 0, OTHR, "TXF", TGSI_OPCODE_TXF },
-   { 1, 2, 1, 0, 0, 0, 0, OTHR, "TXQ", TGSI_OPCODE_TXQ },
-   { 0, 0, 0, 0, 0, 0, 0, NONE, "CONT", TGSI_OPCODE_CONT },
-   { 0, 1, 0, 0, 0, 0, 0, NONE, "EMIT", TGSI_OPCODE_EMIT },
-   { 0, 1, 0, 0, 0, 0, 0, NONE, "ENDPRIM", TGSI_OPCODE_ENDPRIM },
-   { 0, 0, 0, 0, 1, 0, 1, NONE, "BGNLOOP", TGSI_OPCODE_BGNLOOP },
-   { 0, 0, 0, 0, 0, 0, 1, NONE, "BGNSUB", TGSI_OPCODE_BGNSUB },
-   { 0, 0, 0, 0, 1, 1, 0, NONE, "ENDLOOP", TGSI_OPCODE_ENDLOOP },
-   { 0, 0, 0, 0, 0, 1, 0, NONE, "ENDSUB", TGSI_OPCODE_ENDSUB },
-   { 1, 1, 1, 0, 0, 0, 0, OTHR, "", 103 }, /* removed */
-   { 1, 1, 1, 0, 0, 0, 0, OTHR, "TXQS", TGSI_OPCODE_TXQS },
-   { 1, 1, 0, 0, 0, 0, 0, OTHR, "RESQ", TGSI_OPCODE_RESQ },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "READ_FIRST", TGSI_OPCODE_READ_FIRST },
-   { 0, 0, 0, 0, 0, 0, 0, NONE, "NOP", TGSI_OPCODE_NOP },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "FSEQ", TGSI_OPCODE_FSEQ },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "FSGE", TGSI_OPCODE_FSGE },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "FSLT", TGSI_OPCODE_FSLT },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "FSNE", TGSI_OPCODE_FSNE },
-   { 0, 1, 0, 0, 0, 0, 0, OTHR, "MEMBAR", TGSI_OPCODE_MEMBAR },
-   { 0, 1, 0, 0, 0, 0, 0, NONE, "", 113 }, /* removed */
-   { 0, 1, 0, 0, 0, 0, 0, NONE, "", 114 }, /* removed */
-   { 0, 1, 0, 0, 0, 0, 0, NONE, "", 115 }, /* removed */
-   { 0, 1, 0, 0, 0, 0, 0, NONE, "KILL_IF", TGSI_OPCODE_KILL_IF },
-   { 0, 0, 0, 0, 0, 0, 0, NONE, "END", TGSI_OPCODE_END },
-   { 1, 3, 0, 0, 0, 0, 0, COMP, "DFMA", TGSI_OPCODE_DFMA },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "F2I", TGSI_OPCODE_F2I },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "IDIV", TGSI_OPCODE_IDIV },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "IMAX", TGSI_OPCODE_IMAX },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "IMIN", TGSI_OPCODE_IMIN },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "INEG", TGSI_OPCODE_INEG },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "ISGE", TGSI_OPCODE_ISGE },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "ISHR", TGSI_OPCODE_ISHR },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "ISLT", TGSI_OPCODE_ISLT },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "F2U", TGSI_OPCODE_F2U },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "U2F", TGSI_OPCODE_U2F },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "UADD", TGSI_OPCODE_UADD },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "UDIV", TGSI_OPCODE_UDIV },
-   { 1, 3, 0, 0, 0, 0, 0, COMP, "UMAD", TGSI_OPCODE_UMAD },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "UMAX", TGSI_OPCODE_UMAX },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "UMIN", TGSI_OPCODE_UMIN },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "UMOD", TGSI_OPCODE_UMOD },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "UMUL", TGSI_OPCODE_UMUL },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "USEQ", TGSI_OPCODE_USEQ },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "USGE", TGSI_OPCODE_USGE },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "USHR", TGSI_OPCODE_USHR },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "USLT", TGSI_OPCODE_USLT },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "USNE", TGSI_OPCODE_USNE },
-   { 0, 1, 0, 0, 0, 0, 0, NONE, "SWITCH", TGSI_OPCODE_SWITCH },
-   { 0, 1, 0, 0, 0, 0, 0, NONE, "CASE", TGSI_OPCODE_CASE },
-   { 0, 0, 0, 0, 0, 0, 0, NONE, "DEFAULT", TGSI_OPCODE_DEFAULT },
-   { 0, 0, 0, 0, 0, 0, 0, NONE, "ENDSWITCH", TGSI_OPCODE_ENDSWITCH },
+#define OPCODE(_num_dst, _num_src, _output_mode, name, ...) \
+   { .mnemonic = #name, .opcode = TGSI_OPCODE_ ## name, \
+     .output_mode = _output_mode, .num_dst = _num_dst, .num_src = _num_src, \
+     ##__VA_ARGS__ },
 
-   { 1, 3, 0, 0, 0, 0, 0, OTHR, "SAMPLE",      TGSI_OPCODE_SAMPLE },
-   { 1, 2, 0, 0, 0, 0, 0, OTHR, "SAMPLE_I",    TGSI_OPCODE_SAMPLE_I },
-   { 1, 3, 0, 0, 0, 0, 0, OTHR, "SAMPLE_I_MS", TGSI_OPCODE_SAMPLE_I_MS },
-   { 1, 4, 0, 0, 0, 0, 0, OTHR, "SAMPLE_B",    TGSI_OPCODE_SAMPLE_B },
-   { 1, 4, 0, 0, 0, 0, 0, OTHR, "SAMPLE_C",    TGSI_OPCODE_SAMPLE_C },
-   { 1, 4, 0, 0, 0, 0, 0, OTHR, "SAMPLE_C_LZ", TGSI_OPCODE_SAMPLE_C_LZ },
-   { 1, 5, 0, 0, 0, 0, 0, OTHR, "SAMPLE_D",    TGSI_OPCODE_SAMPLE_D },
-   { 1, 4, 0, 0, 0, 0, 0, OTHR, "SAMPLE_L",    TGSI_OPCODE_SAMPLE_L },
-   { 1, 3, 0, 0, 0, 0, 0, OTHR, "GATHER4",     TGSI_OPCODE_GATHER4 },
-   { 1, 2, 0, 0, 0, 0, 0, OTHR, "SVIEWINFO",   TGSI_OPCODE_SVIEWINFO },
-   { 1, 2, 0, 0, 0, 0, 0, OTHR, "SAMPLE_POS",  TGSI_OPCODE_SAMPLE_POS },
-   { 1, 2, 0, 0, 0, 0, 0, OTHR, "SAMPLE_INFO", TGSI_OPCODE_SAMPLE_INFO },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "UARL", TGSI_OPCODE_UARL },
-   { 1, 3, 0, 0, 0, 0, 0, COMP, "UCMP", TGSI_OPCODE_UCMP },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "IABS", TGSI_OPCODE_IABS },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "ISSG", TGSI_OPCODE_ISSG },
-   { 1, 2, 0, 0, 0, 0, 0, OTHR, "LOAD", TGSI_OPCODE_LOAD },
-   { 1, 2, 0, 1, 0, 0, 0, OTHR, "STORE", TGSI_OPCODE_STORE },
-   { 1, 0, 0, 0, 0, 0, 0, OTHR, "", 163 }, /* removed */
-   { 1, 0, 0, 0, 0, 0, 0, OTHR, "", 164 }, /* removed */
-   { 1, 0, 0, 0, 0, 0, 0, OTHR, "", 165 }, /* removed */
-   { 0, 0, 0, 0, 0, 0, 0, OTHR, "BARRIER", TGSI_OPCODE_BARRIER },
+#define OPCODE_GAP(opc) { .mnemonic = "", .opcode = opc },
 
-   { 1, 3, 0, 1, 0, 0, 0, OTHR, "ATOMUADD", TGSI_OPCODE_ATOMUADD },
-   { 1, 3, 0, 1, 0, 0, 0, OTHR, "ATOMXCHG", TGSI_OPCODE_ATOMXCHG },
-   { 1, 4, 0, 1, 0, 0, 0, OTHR, "ATOMCAS", TGSI_OPCODE_ATOMCAS },
-   { 1, 3, 0, 1, 0, 0, 0, OTHR, "ATOMAND", TGSI_OPCODE_ATOMAND },
-   { 1, 3, 0, 1, 0, 0, 0, OTHR, "ATOMOR", TGSI_OPCODE_ATOMOR },
-   { 1, 3, 0, 1, 0, 0, 0, OTHR, "ATOMXOR", TGSI_OPCODE_ATOMXOR },
-   { 1, 3, 0, 1, 0, 0, 0, OTHR, "ATOMUMIN", TGSI_OPCODE_ATOMUMIN },
-   { 1, 3, 0, 1, 0, 0, 0, OTHR, "ATOMUMAX", TGSI_OPCODE_ATOMUMAX },
-   { 1, 3, 0, 1, 0, 0, 0, OTHR, "ATOMIMIN", TGSI_OPCODE_ATOMIMIN },
-   { 1, 3, 0, 1, 0, 0, 0, OTHR, "ATOMIMAX", TGSI_OPCODE_ATOMIMAX },
-   { 1, 3, 1, 0, 0, 0, 0, OTHR, "TEX2", TGSI_OPCODE_TEX2 },
-   { 1, 3, 1, 0, 0, 0, 0, OTHR, "TXB2", TGSI_OPCODE_TXB2 },
-   { 1, 3, 1, 0, 0, 0, 0, OTHR, "TXL2", TGSI_OPCODE_TXL2 },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "IMUL_HI", TGSI_OPCODE_IMUL_HI },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "UMUL_HI", TGSI_OPCODE_UMUL_HI },
-   { 1, 3, 1, 0, 0, 0, 0, OTHR, "TG4", TGSI_OPCODE_TG4 },
-   { 1, 2, 1, 0, 0, 0, 0, OTHR, "LODQ", TGSI_OPCODE_LODQ },
-   { 1, 3, 0, 0, 0, 0, 0, COMP, "IBFE", TGSI_OPCODE_IBFE },
-   { 1, 3, 0, 0, 0, 0, 0, COMP, "UBFE", TGSI_OPCODE_UBFE },
-   { 1, 4, 0, 0, 0, 0, 0, COMP, "BFI", TGSI_OPCODE_BFI },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "BREV", TGSI_OPCODE_BREV },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "POPC", TGSI_OPCODE_POPC },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "LSB", TGSI_OPCODE_LSB },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "IMSB", TGSI_OPCODE_IMSB },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "UMSB", TGSI_OPCODE_UMSB },
-   { 1, 1, 0, 0, 0, 0, 0, OTHR, "INTERP_CENTROID", TGSI_OPCODE_INTERP_CENTROID },
-   { 1, 2, 0, 0, 0, 0, 0, OTHR, "INTERP_SAMPLE", TGSI_OPCODE_INTERP_SAMPLE },
-   { 1, 2, 0, 0, 0, 0, 0, OTHR, "INTERP_OFFSET", TGSI_OPCODE_INTERP_OFFSET },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "F2D", TGSI_OPCODE_F2D },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "D2F", TGSI_OPCODE_D2F },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DABS", TGSI_OPCODE_DABS },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DNEG", TGSI_OPCODE_DNEG },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "DADD", TGSI_OPCODE_DADD },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "DMUL", TGSI_OPCODE_DMUL },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "DMAX", TGSI_OPCODE_DMAX },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "DMIN", TGSI_OPCODE_DMIN },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "DSLT", TGSI_OPCODE_DSLT },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "DSGE", TGSI_OPCODE_DSGE },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "DSEQ", TGSI_OPCODE_DSEQ },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "DSNE", TGSI_OPCODE_DSNE },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DRCP", TGSI_OPCODE_DRCP },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DSQRT", TGSI_OPCODE_DSQRT },
-   { 1, 3, 0, 0, 0, 0, 0, COMP, "DMAD", TGSI_OPCODE_DMAD },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DFRAC", TGSI_OPCODE_DFRAC},
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "DLDEXP", TGSI_OPCODE_DLDEXP},
-   { 2, 1, 0, 0, 0, 0, 0, COMP, "DFRACEXP", TGSI_OPCODE_DFRACEXP},
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "D2I", TGSI_OPCODE_D2I },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "I2D", TGSI_OPCODE_I2D },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "D2U", TGSI_OPCODE_D2U },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "U2D", TGSI_OPCODE_U2D },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DRSQ", TGSI_OPCODE_DRSQ },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DTRUNC", TGSI_OPCODE_DTRUNC },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DCEIL", TGSI_OPCODE_DCEIL },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DFLR", TGSI_OPCODE_DFLR },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DROUND", TGSI_OPCODE_DROUND },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "DSSG", TGSI_OPCODE_DSSG },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "VOTE_ANY", TGSI_OPCODE_VOTE_ANY },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "VOTE_ALL", TGSI_OPCODE_VOTE_ALL },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "VOTE_EQ", TGSI_OPCODE_VOTE_EQ },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SEQ", TGSI_OPCODE_U64SEQ },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SNE", TGSI_OPCODE_U64SNE },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "I64SLT", TGSI_OPCODE_I64SLT },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SLT", TGSI_OPCODE_U64SLT },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "I64SGE", TGSI_OPCODE_I64SGE },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SGE", TGSI_OPCODE_U64SGE },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "I64MIN", TGSI_OPCODE_I64MIN },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MIN", TGSI_OPCODE_U64MIN },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "I64MAX", TGSI_OPCODE_I64MAX },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MAX", TGSI_OPCODE_U64MAX },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "I64ABS", TGSI_OPCODE_I64ABS },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "I64SSG", TGSI_OPCODE_I64SSG },
-   { 1, 1, 0, 0, 0, 0, 0, COMP, "I64NEG", TGSI_OPCODE_I64NEG },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64ADD", TGSI_OPCODE_U64ADD },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MUL", TGSI_OPCODE_U64MUL },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SHL", TGSI_OPCODE_U64SHL },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "I64SHR", TGSI_OPCODE_I64SHR },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SHR", TGSI_OPCODE_U64SHR },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "I64DIV", TGSI_OPCODE_I64DIV },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64DIV", TGSI_OPCODE_U64DIV },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "I64MOD", TGSI_OPCODE_I64MOD },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MOD", TGSI_OPCODE_U64MOD },
-   { 1, 2, 0, 0, 0, 0, 0, COMP, "DDIV", TGSI_OPCODE_DDIV },
+static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
+{
+#include "tgsi_info_opcodes.h"
 };
 
+#undef OPCODE
+#undef OPCODE_GAP
+
 const struct tgsi_opcode_info *
 tgsi_get_opcode_info( uint opcode )
 {
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info_opcodes.h b/src/gallium/auxiliary/tgsi/tgsi_info_opcodes.h
new file mode 100644
index 0000000000..a4a9771175
--- /dev/null
+++ b/src/gallium/auxiliary/tgsi/tgsi_info_opcodes.h
@@ -0,0 +1,251 @@
+OPCODE(1, 1, COMP, ARL)
+OPCODE(1, 1, COMP, MOV)
+OPCODE(1, 1, CHAN, LIT)
+OPCODE(1, 1, REPL, RCP)
+OPCODE(1, 1, REPL, RSQ)
+OPCODE(1, 1, CHAN, EXP)
+OPCODE(1, 1, CHAN, LOG)
+OPCODE(1, 2, COMP, MUL)
+OPCODE(1, 2, COMP, ADD)
+OPCODE(1, 2, REPL, DP3)
+OPCODE(1, 2, REPL, DP4)
+OPCODE(1, 2, CHAN, DST)
+OPCODE(1, 2, COMP, MIN)
+OPCODE(1, 2, COMP, MAX)
+OPCODE(1, 2, COMP, SLT)
+OPCODE(1, 2, COMP, SGE)
+OPCODE(1, 3, COMP, MAD)
+OPCODE(1, 2, OTHR, TEX_LZ, .is_tex = 1)
+OPCODE(1, 3, COMP, LRP)
+OPCODE(1, 3, COMP, FMA)
+OPCODE(1, 1, REPL, SQRT)
+OPCODE_GAP(21) /* removed */
+OPCODE(1, 1, COMP, F2U64)
+OPCODE(1, 1, COMP, F2I64)
+OPCODE(1, 1, COMP, FRC)
+OPCODE(1, 2, OTHR, TXF_LZ, .is_tex = 1)
+OPCODE(1, 1, COMP, FLR)
+OPCODE(1, 1, COMP, ROUND)
+OPCODE(1, 1, REPL, EX2)
+OPCODE(1, 1, REPL, LG2)
+OPCODE(1, 2, REPL, POW)
+OPCODE_GAP(31) /* removed */
+OPCODE(1, 1, COMP, U2I64)
+OPCODE(1, 0, OTHR, CLOCK)
+OPCODE(1, 1, COMP, I2I64)
+OPCODE_GAP(35) /* removed */
+OPCODE(1, 1, REPL, COS)
+OPCODE(1, 1, COMP, DDX)
+OPCODE(1, 1, COMP, DDY)
+OPCODE(0, 0, NONE, KILL)
+OPCODE(1, 1, REPL, PK2H)
+OPCODE(1, 1, REPL, PK2US)
+OPCODE(1, 1, REPL, PK4B)
+OPCODE(1, 1, REPL, PK4UB)
+OPCODE(1, 1, COMP, D2U64)
+OPCODE(1, 2, COMP, SEQ)
+OPCODE(1, 1, COMP, D2I64)
+OPCODE(1, 2, COMP, SGT)
+OPCODE(1, 1, REPL, SIN)
+OPCODE(1, 2, COMP, SLE)
+OPCODE(1, 2, COMP, SNE)
+OPCODE(1, 1, COMP, U642D)
+OPCODE(1, 2, OTHR, TEX, .is_tex = 1)
+OPCODE(1, 4, OTHR, TXD, .is_tex = 1)
+OPCODE(1, 2, OTHR, TXP, .is_tex = 1)
+OPCODE(1, 1, CHAN, UP2H)
+OPCODE(1, 1, CHAN, UP2US)
+OPCODE(1, 1, CHAN, UP4B)
+OPCODE(1, 1, CHAN, UP4UB)
+OPCODE(1, 1, COMP, U642F)
+OPCODE(1, 1, COMP, I642F)
+OPCODE(1, 1, COMP, ARR)
+OPCODE(1, 1, COMP, I642D)
+OPCODE(0, 0, NONE, CAL, .is_branch = 1)
+OPCODE(0, 0, NONE, RET)
+OPCODE(1, 1, COMP, SSG)
+OPCODE(1, 3, COMP, CMP)
+OPCODE_GAP(67) /* removed */
+OPCODE(1, 2, OTHR, TXB, .is_tex = 1)
+OPCODE(1, 1, OTHR, FBFETCH)
+OPCODE(1, 2, COMP, DIV)
+OPCODE(1, 2, REPL, DP2)
+OPCODE(1, 2, OTHR, TXL, .is_tex = 1)
+OPCODE(0, 0, NONE, BRK)
+OPCODE(0, 1, NONE, IF, .is_branch = 1, .post_indent = 1)
+OPCODE(0, 1, NONE, UIF, .is_branch = 1, .post_indent = 1)
+OPCODE(1, 2, COMP, READ_INVOC)
+OPCODE(0, 0, NONE, ELSE, .is_branch = 1, .pre_dedent = 1, .post_indent = 1)
+OPCODE(0, 0, NONE, ENDIF, .pre_dedent = 1)
+OPCODE(1, 1, COMP, DDX_FINE)
+OPCODE(1, 1, COMP, DDY_FINE)
+OPCODE_GAP(81) /* removed */
+OPCODE_GAP(82) /* removed */
+OPCODE(1, 1, COMP, CEIL)
+OPCODE(1, 1, COMP, I2F)
+OPCODE(1, 1, COMP, NOT)
+OPCODE(1, 1, COMP, TRUNC)
+OPCODE(1, 2, COMP, SHL)
+OPCODE(1, 1, OTHR, BALLOT)
+OPCODE(1, 2, COMP, AND)
+OPCODE(1, 2, COMP, OR)
+OPCODE(1, 2, COMP, MOD)
+OPCODE(1, 2, COMP, XOR)
+OPCODE_GAP(93) /* removed */
+OPCODE(1, 2, OTHR, TXF, .is_tex = 1)
+OPCODE(1, 2, OTHR, TXQ, .is_tex = 1)
+OPCODE(0, 0, NONE, CONT)
+OPCODE(0, 1, NONE, EMIT)
+OPCODE(0, 1, NONE, ENDPRIM)
+OPCODE(0, 0, NONE, BGNLOOP, .is_branch = 1, .post_indent = 1)
+OPCODE(0, 0, NONE, BGNSUB, .post_indent = 1)
+OPCODE(0, 0, NONE, ENDLOOP, .is_branch = 1, .pre_dedent = 1)
+OPCODE(0, 0, NONE, ENDSUB, .pre_dedent = 1)
+OPCODE_GAP(103) /* removed */
+OPCODE(1, 1, OTHR, TXQS, .is_tex = 1)
+OPCODE(1, 1, OTHR, RESQ)
+OPCODE(1, 1, COMP, READ_FIRST)
+OPCODE(0, 0, NONE, NOP)
+OPCODE(1, 2, COMP, FSEQ)
+OPCODE(1, 2, COMP, FSGE)
+OPCODE(1, 2, COMP, FSLT)
+OPCODE(1, 2, COMP, FSNE)
+OPCODE(0, 1, OTHR, MEMBAR)
+OPCODE_GAP(113) /* removed */
+OPCODE_GAP(114) /* removed */
+OPCODE_GAP(115) /* removed */
+OPCODE(0, 1, NONE, KILL_IF)
+OPCODE(0, 0, NONE, END)
+OPCODE(1, 3, COMP, DFMA)
+OPCODE(1, 1, COMP, F2I)
+OPCODE(1, 2, COMP, IDIV)
+OPCODE(1, 2, COMP, IMAX)
+OPCODE(1, 2, COMP, IMIN)
+OPCODE(1, 1, COMP, INEG)
+OPCODE(1, 2, COMP, ISGE)
+OPCODE(1, 2, COMP, ISHR)
+OPCODE(1, 2, COMP, ISLT)
+OPCODE(1, 1, COMP, F2U)
+OPCODE(1, 1, COMP, U2F)
+OPCODE(1, 2, COMP, UADD)
+OPCODE(1, 2, COMP, UDIV)
+OPCODE(1, 3, COMP, UMAD)
+OPCODE(1, 2, COMP, UMAX)
+OPCODE(1, 2, COMP, UMIN)
+OPCODE(1, 2, COMP, UMOD)
+OPCODE(1, 2, COMP, UMUL)
+OPCODE(1, 2, COMP, USEQ)
+OPCODE(1, 2, COMP, USGE)
+OPCODE(1, 2, COMP, USHR)
+OPCODE(1, 2, COMP, USLT)
+OPCODE(1, 2, COMP, USNE)
+OPCODE(0, 1, NONE, SWITCH)
+OPCODE(0, 1, NONE, CASE)
+OPCODE(0, 0, NONE, DEFAULT)
+OPCODE(0, 0, NONE, ENDSWITCH)
+
+OPCODE(1, 3, OTHR, SAMPLE)
+OPCODE(1, 2, OTHR, SAMPLE_I)
+OPCODE(1, 3, OTHR, SAMPLE_I_MS)
+OPCODE(1, 4, OTHR, SAMPLE_B)
+OPCODE(1, 4, OTHR, SAMPLE_C)
+OPCODE(1, 4, OTHR, SAMPLE_C_LZ)
+OPCODE(1, 5, OTHR, SAMPLE_D)
+OPCODE(1, 4, OTHR, SAMPLE_L)
+OPCODE(1, 3, OTHR, GATHER4)
+OPCODE(1, 2, OTHR, SVIEWINFO)
+OPCODE(1, 2, OTHR, SAMPLE_POS)
+OPCODE(1, 2, OTHR, SAMPLE_INFO)
+OPCODE(1, 1, COMP, UARL)
+OPCODE(1, 3, COMP, UCMP)
+OPCODE(1, 1, COMP, IABS)
+OPCODE(1, 1, COMP, ISSG)
+OPCODE(1, 2, OTHR, LOAD)
+OPCODE(1, 2, OTHR, STORE, .is_store = 1)
+OPCODE_GAP(163) /* removed */
+OPCODE_GAP(164) /* removed */
+OPCODE_GAP(165) /* removed */
+OPCODE(0, 0, OTHR, BARRIER)
+
+OPCODE(1, 3, OTHR, ATOMUADD, .is_store = 1)
+OPCODE(1, 3, OTHR, ATOMXCHG, .is_store = 1)
+OPCODE(1, 4, OTHR, ATOMCAS, .is_store = 1)
+OPCODE(1, 3, OTHR, ATOMAND, .is_store = 1)
+OPCODE(1, 3, OTHR, ATOMOR, .is_store = 1)
+OPCODE(1, 3, OTHR, ATOMXOR, .is_store = 1)
+OPCODE(1, 3, OTHR, ATOMUMIN, .is_store = 1)
+OPCODE(1, 3, OTHR, ATOMUMAX, .is_store = 1)
+OPCODE(1, 3, OTHR, ATOMIMIN, .is_store = 1)
+OPCODE(1, 3, OTHR, ATOMIMAX, .is_store = 1)
+OPCODE(1, 3, OTHR, TEX2, .is_tex = 1)
+OPCODE(1, 3, OTHR, TXB2, .is_tex = 1)
+OPCODE(1, 3, OTHR, TXL2, .is_tex = 1)
+OPCODE(1, 2, COMP, IMUL_HI)
+OPCODE(1, 2, COMP, UMUL_HI)
+OPCODE(1, 3, OTHR, TG4, .is_tex = 1)
+OPCODE(1, 2, OTHR, LODQ, .is_tex = 1)
+OPCODE(1, 3, COMP, IBFE)
+OPCODE(1, 3, COMP, UBFE)
+OPCODE(1, 4, COMP, BFI)
+OPCODE(1, 1, COMP, BREV)
+OPCODE(1, 1, COMP, POPC)
+OPCODE(1, 1, COMP, LSB)
+OPCODE(1, 1, COMP, IMSB)
+OPCODE(1, 1, COMP, UMSB)
+OPCODE(1, 1, OTHR, INTERP_CENTROID)
+OPCODE(1, 2, OTHR, INTERP_SAMPLE)
+OPCODE(1, 2, OTHR, INTERP_OFFSET)
+OPCODE(1, 1, COMP, F2D)
+OPCODE(1, 1, COMP, D2F)
+OPCODE(1, 1, COMP, DABS)
+OPCODE(1, 1, COMP, DNEG)
+OPCODE(1, 2, COMP, DADD)
+OPCODE(1, 2, COMP, DMUL)
+OPCODE(1, 2, COMP, DMAX)
+OPCODE(1, 2, COMP, DMIN)
+OPCODE(1, 2, COMP, DSLT)
+OPCODE(1, 2, COMP, DSGE)
+OPCODE(1, 2, COMP, DSEQ)
+OPCODE(1, 2, COMP, DSNE)
+OPCODE(1, 1, COMP, DRCP)
+OPCODE(1, 1, COMP, DSQRT)
+OPCODE(1, 3, COMP, DMAD)
+OPCODE(1, 1, COMP, DFRAC)
+OPCODE(1, 2, COMP, DLDEXP)
+OPCODE(2, 1, COMP, DFRACEXP)
+OPCODE(1, 1, COMP, D2I)
+OPCODE(1, 1, COMP, I2D)
+OPCODE(1, 1, COMP, D2U)
+OPCODE(1, 1, COMP, U2D)
+OPCODE(1, 1, COMP, DRSQ)
+OPCODE(1, 1, COMP, DTRUNC)
+OPCODE(1, 1, COMP, DCEIL)
+OPCODE(1, 1, COMP, DFLR)
+OPCODE(1, 1, COMP, DROUND)
+OPCODE(1, 1, COMP, DSSG)
+OPCODE(1, 1, COMP, VOTE_ANY)
+OPCODE(1, 1, COMP, VOTE_ALL)
+OPCODE(1, 1, COMP, VOTE_EQ)
+OPCODE(1, 2, COMP, U64SEQ)
+OPCODE(1, 2, COMP, U64SNE)
+OPCODE(1, 2, COMP, I64SLT)
+OPCODE(1, 2, COMP, U64SLT)
+OPCODE(1, 2, COMP, I64SGE)
+OPCODE(1, 2, COMP, U64SGE)
+OPCODE(1, 2, COMP, I64MIN)
+OPCODE(1, 2, COMP, U64MIN)
+OPCODE(1, 2, COMP, I64MAX)
+OPCODE(1, 2, COMP, U64MAX)
+OPCODE(1, 1, COMP, I64ABS)
+OPCODE(1, 1, COMP, I64SSG)
+OPCODE(1, 1, COMP, I64NEG)
+OPCODE(1, 2, COMP, U64ADD)
+OPCODE(1, 2, COMP, U64MUL)
+OPCODE(1, 2, COMP, U64SHL)
+OPCODE(1, 2, COMP, I64SHR)
+OPCODE(1, 2, COMP, U64SHR)
+OPCODE(1, 2, COMP, I64DIV)
+OPCODE(1, 2, COMP, U64DIV)
+OPCODE(1, 2, COMP, I64MOD)
+OPCODE(1, 2, COMP, U64MOD)
+OPCODE(1, 2, COMP, DDIV)