diff options
author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-03-15 18:47:14 -0500 |
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committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-03-21 15:46:33 -0500 |
commit | 7eebf931bdfb5a4db554b492ae2bc77f038ca2c9 (patch) | |
tree | 83428d28790ee3143682298dd71766614e2d87d8 | |
parent | 0cae54d0adc2c445803f3a0c247312e5f578fbee (diff) |
radeonsi: adjust buffer_append_args to take a 128 bit resource
Move the buffer resource extraction code out into its own function.
-rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 30 |
1 files changed, 23 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 0be886eb4e..131313461e 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -2924,9 +2924,28 @@ static void image_append_args( } /** + * Given a 256 bit resource, extract the top half (which stores the buffer + * resource in the case of textures and images). + */ +static LLVMValueRef extract_rsrc_top_half( + struct si_shader_context *ctx, + LLVMValueRef rsrc) +{ + struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base; + LLVMTypeRef v2i128 = LLVMVectorType(ctx->i128, 2); + + rsrc = LLVMBuildBitCast(gallivm->builder, rsrc, v2i128, ""); + rsrc = LLVMBuildExtractElement(gallivm->builder, rsrc, bld_base->uint_bld.one, ""); + rsrc = LLVMBuildBitCast(gallivm->builder, rsrc, ctx->v4i32, ""); + + return rsrc; +} + +/** * Append the resource and indexing arguments for buffer intrinsics. * - * \param rsrc the 256 bit resource + * \param rsrc the v4i32 buffer resource * \param index index into the buffer */ static void buffer_append_args( @@ -2936,17 +2955,11 @@ static void buffer_append_args( LLVMValueRef index, bool atomic) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base; const struct tgsi_full_instruction *inst = emit_data->inst; - LLVMTypeRef v2i128 = LLVMVectorType(ctx->i128, 2); LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0); LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0); - rsrc = LLVMBuildBitCast(gallivm->builder, rsrc, v2i128, ""); - rsrc = LLVMBuildExtractElement(gallivm->builder, rsrc, bld_base->uint_bld.one, ""); - rsrc = LLVMBuildBitCast(gallivm->builder, rsrc, ctx->v4i32, ""); - emit_data->args[emit_data->arg_count++] = rsrc; emit_data->args[emit_data->arg_count++] = index; /* vindex */ emit_data->args[emit_data->arg_count++] = bld_base->uint_bld.zero; /* voffset */ @@ -2975,6 +2988,7 @@ static void load_fetch_args( coords = image_fetch_coords(bld_base, inst, 1); if (target == TGSI_TEXTURE_BUFFER) { + rsrc = extract_rsrc_top_half(ctx, rsrc); buffer_append_args(ctx, emit_data, rsrc, coords, false); } else { emit_data->args[0] = coords; @@ -3052,6 +3066,7 @@ static void store_fetch_args( emit_data->args[0] = data; emit_data->arg_count = 1; + rsrc = extract_rsrc_top_half(ctx, rsrc); buffer_append_args(ctx, emit_data, rsrc, coords, false); } else { emit_data->args[0] = data; @@ -3131,6 +3146,7 @@ static void atomic_fetch_args( emit_data->args[emit_data->arg_count++] = data1; if (target == TGSI_TEXTURE_BUFFER) { + rsrc = extract_rsrc_top_half(ctx, rsrc); buffer_append_args(ctx, emit_data, rsrc, coords, true); } else { emit_data->args[emit_data->arg_count++] = coords; |