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authorLeo Liu <leo.liu@amd.com>2017-09-05 13:30:57 -0400
committerLeo Liu <leo.liu@amd.com>2017-09-06 15:53:18 -0400
commite1e3c0384bb7243f339e0f7405c432a45cf92ff4 (patch)
tree18afe42f1d1ff5be8a36f0ac27462d7b88abb051
parentad160c2273ce4c76fd4713badc126e05dfe9cb81 (diff)
radeon/uvd: fix the assertion check for YUYV format
Fixes:7319ff87("radeon/uvd: add YUYV format support for target buffer") Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
-rw-r--r--src/gallium/drivers/radeon/radeon_uvd.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index 00d6267018..fabc73e383 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -1588,9 +1588,11 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
}
- assert(luma->u.legacy.bankw == chroma->u.legacy.bankw);
- assert(luma->u.legacy.bankh == chroma->u.legacy.bankh);
- assert(luma->u.legacy.mtilea == chroma->u.legacy.mtilea);
+ if (chroma) {
+ assert(luma->u.legacy.bankw == chroma->u.legacy.bankw);
+ assert(luma->u.legacy.bankh == chroma->u.legacy.bankh);
+ assert(luma->u.legacy.mtilea == chroma->u.legacy.mtilea);
+ }
msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->u.legacy.bankw));
msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->u.legacy.bankh));