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author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2017-09-07 12:16:36 +0200 |
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committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2017-09-13 18:26:51 +0200 |
commit | b0ee0e086059f36b076a0a81472931e42de11bff (patch) | |
tree | 8f591380c600ee85e6becc6f4f3f06581332eec6 | |
parent | e4af4433fc802fafcb6050e290c514ff40c8735d (diff) |
ac/addrlib: relax an assertion
This assertion is triggered on Stoney in Piglit
./bin/framebuffer-blit-levels {draw,read} stencil -auto -fbo
and similar tests. It should be harmless -- just relax it until
we can get internal clarification.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
-rw-r--r-- | src/amd/addrlib/r800/ciaddrlib.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp index 5dd52dd233..4f67350c82 100644 --- a/src/amd/addrlib/r800/ciaddrlib.cpp +++ b/src/amd/addrlib/r800/ciaddrlib.cpp @@ -747,7 +747,7 @@ ADDR_E_RETURNCODE CiLib::HwlComputeSurfaceInfo( SiLib::HwlComputeSurfaceInfo(&localIn, pOut); - ADDR_ASSERT((MinDepth2DThinIndex <= pOut->tileIndex) && (MaxDepth2DThinIndex >= pOut->tileIndex)); + ADDR_ASSERT(((MinDepth2DThinIndex <= pOut->tileIndex) && (MaxDepth2DThinIndex >= pOut->tileIndex)) || pOut->tileIndex == Depth1DThinIndex); depthStencil2DTileConfigMatch = DepthStencilTileCfgMatch(pIn, pOut); } |