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authorNicolai Hähnle <nicolai.haehnle@amd.com>2017-09-15 18:47:52 +0200
committerNicolai Hähnle <nicolai.haehnle@amd.com>2017-09-16 13:18:43 +0200
commit1085f89a83e5137b5280a3c310b57ea86f29856d (patch)
treee23a1db5b4cc4b7cc8b6c15cc87bdaca6ce83d0a
parentad393c676176bde1972457c25f670cc50d3f60cd (diff)
tgsi: infer that dst[1] of DFRACEXP is an integer
-rw-r--r--src/gallium/auxiliary/gallivm/lp_bld_tgsi.c2
-rw-r--r--src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c4
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_info.c5
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_info.h2
-rw-r--r--src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c2
5 files changed, 9 insertions, 6 deletions
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
index b33976bb64..079a6eed49 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
@@ -201,7 +201,7 @@ void lp_build_fetch_args(
static int get_src_chan_idx(unsigned opcode,
int dst_chan_index)
{
- enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(opcode);
+ enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(opcode, 0);
enum tgsi_opcode_type stype = tgsi_opcode_infer_src_type(opcode, 0);
if (!tgsi_type_is_64bit(dtype) && !tgsi_type_is_64bit(stype))
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 45110e8b9f..ca7e605792 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -1751,7 +1751,7 @@ emit_store_chan(
struct lp_build_context *float_bld = &bld_base->base;
struct lp_build_context *int_bld = &bld_base->int_bld;
LLVMValueRef indirect_index = NULL;
- enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode);
+ enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode, index);
/*
* Apply saturation.
@@ -1917,7 +1917,7 @@ emit_store(
LLVMValueRef dst[4])
{
- enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode);
+ enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode, index);
unsigned writemask = inst->Dst[index].Register.WriteMask;
while (writemask) {
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c
index 36be463dc8..62b41c031b 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -312,7 +312,10 @@ tgsi_opcode_infer_src_type(uint opcode, uint src_idx)
* infer the destination type of a TGSI opcode.
*/
enum tgsi_opcode_type
-tgsi_opcode_infer_dst_type( uint opcode )
+tgsi_opcode_infer_dst_type( uint opcode, uint dst_idx )
{
+ if (dst_idx == 1 && opcode == TGSI_OPCODE_DFRACEXP)
+ return TGSI_TYPE_SIGNED;
+
return tgsi_opcode_infer_type(opcode);
}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.h b/src/gallium/auxiliary/tgsi/tgsi_info.h
index f3ef46fb4a..8d32f4774b 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.h
@@ -114,7 +114,7 @@ enum tgsi_opcode_type
tgsi_opcode_infer_src_type( uint opcode, uint src_idx );
enum tgsi_opcode_type
-tgsi_opcode_infer_dst_type( uint opcode );
+tgsi_opcode_infer_dst_type( uint opcode, uint dst_idx );
#if defined __cplusplus
}
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index 67172729bb..1a8f831597 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
@@ -890,7 +890,7 @@ void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
LLVMBuilderRef builder = ctx->gallivm.builder;
LLVMValueRef temp_ptr, temp_ptr2 = NULL;
bool is_vec_store = false;
- enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode);
+ enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode, index);
if (dst[0]) {
LLVMTypeKind k = LLVMGetTypeKind(LLVMTypeOf(dst[0]));